Lines Matching refs:ret
101 int ret;
103 ret = __cw1200_reg_read(priv, addr, buf, buf_len, 0);
105 return ret;
111 int ret;
113 ret = __cw1200_reg_write(priv, addr, buf, buf_len, 0);
115 return ret;
120 int ret, retry = 1;
126 ret = __cw1200_reg_read(priv,
129 if (!ret) {
136 pr_err("error :[%d]\n", ret);
141 return ret;
147 int ret, retry = 1;
153 ret = __cw1200_reg_write(priv,
156 if (!ret) {
163 pr_err("error :[%d]\n", ret);
168 return ret;
175 int i, ret;
184 ret = __cw1200_reg_write_32(priv, ST90TDS_SRAM_BASE_ADDR_REG_ID, addr);
185 if (ret < 0) {
191 ret = __cw1200_reg_read_32(priv, ST90TDS_CONFIG_REG_ID, &val32);
192 if (ret < 0) {
198 ret = __cw1200_reg_write_32(priv, ST90TDS_CONFIG_REG_ID,
200 if (ret < 0) {
207 ret = __cw1200_reg_read_32(priv, ST90TDS_CONFIG_REG_ID, &val32);
208 if (ret < 0) {
224 ret = __cw1200_reg_read(priv, port_addr, buf, buf_len, 0);
225 if (ret < 0) {
232 return ret;
238 int ret;
248 ret = __cw1200_reg_write_32(priv, ST90TDS_SRAM_BASE_ADDR_REG_ID, addr);
249 if (ret < 0) {
255 ret = __cw1200_reg_write(priv, ST90TDS_SRAM_DPORT_REG_ID,
257 if (ret < 0) {
264 return ret;
271 int ret;
274 ret = __cw1200_reg_read_32(priv, ST90TDS_CONFIG_REG_ID, &val32);
275 if (ret < 0) {
277 return ret;
285 ret = __cw1200_reg_write_32(priv, ST90TDS_CONFIG_REG_ID, val32);
286 if (ret < 0) {
288 return ret;
291 ret = __cw1200_reg_read_16(priv, ST90TDS_CONFIG_REG_ID, &val16);
292 if (ret < 0) {
294 return ret;
302 ret = __cw1200_reg_write_16(priv, ST90TDS_CONFIG_REG_ID, val16);
303 if (ret < 0) {
305 return ret;