Lines Matching refs:wdev

80 static int wfx_sram_write_dma_safe(struct wfx_dev *wdev, u32 addr, const u8 *buf, size_t len)
92 ret = wfx_sram_buf_write(wdev, addr, tmp, len);
98 static int get_firmware(struct wfx_dev *wdev, u32 keyset_chip,
107 wdev->pdata.file_fw, keyset_chip);
108 ret = firmware_request_nowarn(fw, filename, wdev->dev);
110 dev_info(wdev->dev, "can't load %s, falling back to %s.sec\n",
111 filename, wdev->pdata.file_fw);
112 snprintf(filename, sizeof(filename), "%s.sec", wdev->pdata.file_fw);
113 ret = request_firmware(fw, filename, wdev->dev);
115 dev_err(wdev->dev, "can't load %s\n", filename);
130 dev_err(wdev->dev, "%s corrupted\n", filename);
137 dev_err(wdev->dev, "firmware keyset is incompatible with chip (file: 0x%02X, chip: 0x%02X)\n",
143 wdev->keyset = keyset_file;
147 static int wait_ncp_status(struct wfx_dev *wdev, u32 status)
155 ret = wfx_sram_reg_read(wdev, WFX_DCA_NCP_STATUS, &reg);
165 dev_dbg(wdev->dev, "chip answer after %lldus\n", ktime_us_delta(now, start));
167 dev_dbg(wdev->dev, "chip answer immediately\n");
171 static int upload_firmware(struct wfx_dev *wdev, const u8 *data, size_t len)
178 dev_err(wdev->dev, "firmware size is not aligned. Buffer overrun will occur\n");
190 ret = wfx_sram_reg_read(wdev, WFX_DCA_GET, &bytes_done);
195 dev_dbg(wdev->dev, "answer after %lldus\n", ktime_us_delta(now, start));
197 ret = wfx_sram_write_dma_safe(wdev, WFX_DNLD_FIFO + (offs % DNLD_FIFO_SIZE),
204 ret = wfx_sram_reg_write(wdev, WFX_DCA_PUT, offs);
211 static void print_boot_status(struct wfx_dev *wdev)
215 wfx_sram_reg_read(wdev, WFX_STATUS_INFO, &reg);
218 wfx_sram_reg_read(wdev, WFX_ERR_INFO, &reg);
220 dev_info(wdev->dev, "secure boot: %s\n", fwio_errors[reg]);
222 dev_info(wdev->dev, "secure boot: Error %#02x\n", reg);
225 static int load_firmware_secure(struct wfx_dev *wdev)
239 wfx_sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_READY);
240 ret = wait_ncp_status(wdev, NCP_INFO_READY);
244 wfx_sram_buf_read(wdev, WFX_BOOTLOADER_LABEL, buf, BOOTLOADER_LABEL_SIZE);
246 dev_dbg(wdev->dev, "bootloader: \"%s\"\n", buf);
248 wfx_sram_buf_read(wdev, WFX_PTE_INFO, buf, PTE_INFO_SIZE);
249 ret = get_firmware(wdev, buf[PTE_INFO_KEYSET_IDX], &fw, &fw_offset);
254 wfx_sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_INFO_READ);
255 ret = wait_ncp_status(wdev, NCP_READY);
259 wfx_sram_reg_write(wdev, WFX_DNLD_FIFO, 0xFFFFFFFF); /* Fifo init */
260 wfx_sram_write_dma_safe(wdev, WFX_DCA_FW_VERSION, "\x01\x00\x00\x00", FW_VERSION_SIZE);
261 wfx_sram_write_dma_safe(wdev, WFX_DCA_FW_SIGNATURE, fw->data + fw_offset,
263 wfx_sram_write_dma_safe(wdev, WFX_DCA_FW_HASH, fw->data + fw_offset + FW_SIGNATURE_SIZE,
265 wfx_sram_reg_write(wdev, WFX_DCA_IMAGE_SIZE, fw->size - header_size);
266 wfx_sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_UPLOAD_PENDING);
267 ret = wait_ncp_status(wdev, NCP_DOWNLOAD_PENDING);
272 ret = upload_firmware(wdev, fw->data + header_size, fw->size - header_size);
275 dev_dbg(wdev->dev, "firmware load after %lldus\n",
278 wfx_sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_UPLOAD_COMPLETE);
279 ret = wait_ncp_status(wdev, NCP_AUTH_OK);
282 ret = wait_ncp_status(wdev, NCP_PUB_KEY_RDY);
285 wfx_sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_OK_TO_JUMP);
291 print_boot_status(wdev);
295 static int init_gpr(struct wfx_dev *wdev)
310 ret = wfx_igpr_reg_write(wdev, gpr_init[i].index, gpr_init[i].value);
313 dev_dbg(wdev->dev, " index %02x: %08x\n", gpr_init[i].index, gpr_init[i].value);
318 int wfx_init_device(struct wfx_dev *wdev)
327 if (wdev->pdata.use_rising_clk)
329 ret = wfx_config_reg_write(wdev, reg);
331 dev_err(wdev->dev, "bus returned an error during first write access. Host configuration error?\n");
335 ret = wfx_config_reg_read(wdev, &reg);
337 dev_err(wdev->dev, "bus returned an error during first read access. Bus configuration error?\n");
341 dev_err(wdev->dev, "chip mute. Bus configuration error or chip wasn't reset?\n");
344 dev_dbg(wdev->dev, "initial config register value: %08x\n", reg);
348 dev_err(wdev->dev, "bad hardware revision number: %d\n", hw_revision);
353 dev_notice(wdev->dev, "development hardware detected\n");
357 ret = init_gpr(wdev);
361 ret = wfx_control_reg_write(wdev, CTRL_WLAN_WAKEUP);
366 ret = wfx_control_reg_read(wdev, &reg);
371 dev_err(wdev->dev, "chip didn't wake up. Chip wasn't reset?\n");
375 dev_dbg(wdev->dev, "chip wake up after %lldus\n", ktime_us_delta(now, start));
377 ret = wfx_config_reg_write_bits(wdev, CFG_CPU_RESET, 0);
380 ret = load_firmware_secure(wdev);
383 return wfx_config_reg_write_bits(wdev,