Lines Matching refs:bw
1758 dpk->bp[path][kidx].bw = chan->channel;
1768 dpk->bp[path][kidx].bw == 0 ? "20M" :
1769 dpk->bp[path][kidx].bw == 1 ? "40M" :
1770 dpk->bp[path][kidx].bw == 2 ? "80M" : "160M");
1830 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) {
1833 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) {
1842 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" :
1843 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M");
2076 rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_TXBB, dpk->bp[path][kidx].bw + 1);
3403 enum rtw89_bandwidth bw, bool dav)
3418 switch (bw) {
3440 bw, path, reg18_addr,
3445 enum rtw89_bandwidth bw)
3447 _bw_setting(rtwdev, RF_PATH_A, bw, true);
3448 _bw_setting(rtwdev, RF_PATH_A, bw, false);
3570 static void _set_rxbb_bw(struct rtw89_dev *rtwdev, enum rtw89_bandwidth bw,
3576 if (bw == RTW89_CHANNEL_WIDTH_20)
3578 else if (bw == RTW89_CHANNEL_WIDTH_40)
3580 else if (bw == RTW89_CHANNEL_WIDTH_80)
3592 enum rtw89_bandwidth bw)
3602 _set_rxbb_bw(rtwdev, bw, path);
3608 enum rtw89_band band, enum rtw89_bandwidth bw)
3611 _ctrl_bw(rtwdev, phy, bw);
3612 _rxbb_bw(rtwdev, phy, bw);