Lines Matching defs:arg
1124 union rtw89_phy_bb_gain_arg arg, u32 data)
1127 u8 type = arg.type;
1128 u8 path = arg.path;
1129 u8 gband = arg.gain_band;
1148 arg.addr, data, type);
1163 union rtw89_phy_bb_gain_arg arg, u32 data)
1166 u8 rxsc_start = arg.rxsc_start;
1167 u8 bw = arg.bw;
1168 u8 path = arg.path;
1169 u8 gband = arg.gain_band;
1238 arg.addr, data, bw);
1245 union rtw89_phy_bb_gain_arg arg, u32 data)
1248 u8 type = arg.type;
1249 u8 path = arg.path;
1250 u8 gband = arg.gain_band;
1265 arg.addr, data, type);
1272 union rtw89_phy_bb_gain_arg arg, u32 data)
1275 u8 type = arg.type;
1276 u8 path = arg.path;
1277 u8 gband = arg.gain_band;
1300 arg.addr, data, type);
1311 union rtw89_phy_bb_gain_arg arg = { .addr = reg->addr };
1314 if (arg.gain_band >= RTW89_BB_GAIN_BAND_NR)
1317 if (arg.path >= chip->rf_path_num)
1320 if (arg.addr >= 0xf9 && arg.addr <= 0xfe) {
1325 switch (arg.cfg_type) {
1327 rtw89_phy_cfg_bb_gain_error(rtwdev, arg, reg->data);
1330 rtw89_phy_cfg_bb_rpl_ofst(rtwdev, arg, reg->data);
1333 rtw89_phy_cfg_bb_gain_bypass(rtwdev, arg, reg->data);
1336 rtw89_phy_cfg_bb_gain_op1db(rtwdev, arg, reg->data);
1346 arg.addr, reg->data, arg.cfg_type);
2797 le32_to_cpu(log->arg[0]), le32_to_cpu(log->arg[1]),
2798 le32_to_cpu(log->arg[2]), le32_to_cpu(log->arg[3]));