realtek/rtw89/coex.c

81 	[CXST_OFF]	= __DEF_FBTC_SLOT(100, 0x55555555, SLOT_MIX),
86 	[CXST_B1]	= __DEF_FBTC_SLOT(250, 0xe5555555, SLOT_MIX),
87 	[CXST_B2]	= __DEF_FBTC_SLOT(7,   0xea5a5a5a, SLOT_MIX),
88 	[CXST_B3]	= __DEF_FBTC_SLOT(5,   0xe5555555, SLOT_MIX),
89 	[CXST_B4]	= __DEF_FBTC_SLOT(50,  0xe5555555, SLOT_MIX),
91 	[CXST_BLK]	= __DEF_FBTC_SLOT(500, 0x55555555, SLOT_MIX),
92 	[CXST_E2G]	= __DEF_FBTC_SLOT(0,   0xea5a5a5a, SLOT_MIX),
94 	[CXST_EBT]	= __DEF_FBTC_SLOT(0,   0xe5555555, SLOT_MIX),
96 	[CXST_WLK]	= __DEF_FBTC_SLOT(250, 0xea5a5a5a, SLOT_MIX),
3399 			_slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX);
3403 			_slot_set(btc, CXST_B1, 50, tbl_b1, SLOT_MIX);
3407 			_slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX);
3411 			_slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX);
3415 			_slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX);
3423 			_slot_set(btc, CXST_B1, 10, cxtbl[25], SLOT_MIX);
3427 			_slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX);
3431 			_slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX);
3435 			_slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX);
3439 			_slot_set(btc, CXST_B1, 80, tbl_b1, SLOT_MIX);
3445 				  tbl_b1, SLOT_MIX);
3458 			_slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX);
3462 			_slot_set(btc, CXST_B1, 50, tbl_b1, SLOT_MIX);
3466 			_slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX);
3470 			_slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX);
3474 			_slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX);
3478 			_slot_set(btc, CXST_B1, 80, tbl_b1, SLOT_MIX);
3488 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3492 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3496 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3502 				  tbl_b1, SLOT_MIX);
3512 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3516 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3520 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3526 				  tbl_b1, SLOT_MIX);
3536 			_slot_set(btc, CXST_B4, 50, tbl_b4, SLOT_MIX);
3537 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3541 			_slot_set(btc, CXST_B4, 70, tbl_b4, SLOT_MIX);
3542 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3546 			_slot_set(btc, CXST_B4, 50, tbl_b4, SLOT_MIX);
3547 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3551 			_slot_set(btc, CXST_B4, 60, tbl_b4, SLOT_MIX);
3552 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3556 			_slot_set(btc, CXST_B4, 80, tbl_b4, SLOT_MIX);
3557 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3563 				  tbl_b4, SLOT_MIX);
3573 			_slot_set(btc, CXST_B4, 50, tbl_b4, SLOT_MIX);
3574 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3578 			_slot_set(btc, CXST_B4, 70, tbl_b4, SLOT_MIX);
3579 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3583 			_slot_set(btc, CXST_B4, 50, tbl_b4, SLOT_MIX);
3584 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3588 			_slot_set(btc, CXST_B4, 60, tbl_b4, SLOT_MIX);
3589 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3593 			_slot_set(btc, CXST_B4, 80, tbl_b4, SLOT_MIX);
3594 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3600 				  tbl_b4, SLOT_MIX);
3762 			_slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX);
3766 			_slot_set(btc, CXST_B1, 50, tbl_b1, SLOT_MIX);
3770 			_slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX);
3774 			_slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX);
3778 			_slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX);
3786 			_slot_set(btc, CXST_B1, 10, cxtbl[25], SLOT_MIX);
3790 			_slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX);
3794 			_slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX);
3798 			_slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX);
3802 			_slot_set(btc, CXST_B1, 80, tbl_b1, SLOT_MIX);
3808 				  tbl_b1, SLOT_MIX);
3821 			_slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX);
3825 			_slot_set(btc, CXST_B1, 50, tbl_b1, SLOT_MIX);
3829 			_slot_set(btc, CXST_B1, 30, tbl_b1, SLOT_MIX);
3833 			_slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX);
3837 			_slot_set(btc, CXST_B1, 60, tbl_b1, SLOT_MIX);
3841 			_slot_set(btc, CXST_B1, 80, tbl_b1, SLOT_MIX);
3847 				  tbl_b1, SLOT_MIX);
3860 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3864 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3868 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3874 				  tbl_b1, SLOT_MIX);
3887 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3891 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3895 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3901 				  tbl_b1, SLOT_MIX);
3914 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3915 			_slot_set(btc, CXST_B4,  50, tbl_b4, SLOT_MIX);
3919 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3920 			_slot_set(btc, CXST_B4,  70, tbl_b4, SLOT_MIX);
3924 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3925 			_slot_set(btc, CXST_B4,  50, tbl_b4, SLOT_MIX);
3929 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3930 			_slot_set(btc, CXST_B4,  60, tbl_b4, SLOT_MIX);
3934 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3935 			_slot_set(btc, CXST_B4,  80, tbl_b4, SLOT_MIX);
3941 				  tbl_b1, SLOT_MIX);
3943 				  tbl_b4, SLOT_MIX);
3956 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3957 			_slot_set(btc, CXST_B4,  50, tbl_b4, SLOT_MIX);
3961 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3962 			_slot_set(btc, CXST_B4,  70, tbl_b4, SLOT_MIX);
3966 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3967 			_slot_set(btc, CXST_B4,  50, tbl_b4, SLOT_MIX);
3971 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3972 			_slot_set(btc, CXST_B4,  60, tbl_b4, SLOT_MIX);
3976 			_slot_set(btc, CXST_B1, BTC_B1_MAX, tbl_b1, SLOT_MIX);
3977 			_slot_set(btc, CXST_B4,  80, tbl_b4, SLOT_MIX);
3983 				  tbl_b1, SLOT_MIX);
3985 				  tbl_b4, SLOT_MIX);