Lines Matching defs:dm
773 struct rtw89_btc_dm *dm = &btc->dm;
778 dm->error.map.h2c_buffer_over = true;
833 memset(&btc->dm, 0, sizeof(btc->dm));
844 btc->dm.tdma_now = t_def[CXTD_OFF];
845 btc->dm.tdma = t_def[CXTD_OFF];
848 btc->dm.slot.v7[i].dur = s_def[i].dur;
849 btc->dm.slot.v7[i].cxtype = s_def[i].cxtype;
850 btc->dm.slot.v7[i].cxtbl = s_def[i].cxtbl;
852 memcpy(&btc->dm.slot_now.v7, &btc->dm.slot.v7,
853 sizeof(btc->dm.slot_now.v7));
855 memcpy(&btc->dm.slot_now.v1, s_def,
856 sizeof(btc->dm.slot_now.v1));
857 memcpy(&btc->dm.slot.v1, s_def,
858 sizeof(btc->dm.slot.v1));
864 btc->dm.coex_info_map = BTC_COEX_INFO_ALL;
865 btc->dm.wl_tx_limit.tx_time = BTC_MAX_TX_TIME_DEF;
866 btc->dm.wl_tx_limit.tx_retry = BTC_MAX_TX_RETRY_DEF;
867 btc->dm.wl_pre_agc_rb = BTC_PREAGC_NOTFOUND;
868 btc->dm.wl_btg_rx_rb = BTC_BTGCTRL_BB_GNT_NOTFOUND;
992 struct rtw89_btc_dm *dm = &btc->dm;
1003 dm->error.map.wl_ver_mismatch = true;
1006 dm->error.map.wl_ver_mismatch = false;
1010 if (dm->cnt_dm[BTC_DCNT_RPT] == cnt && btc->fwinfo.rpt_en_map)
1011 dm->cnt_dm[BTC_DCNT_RPT_HANG]++;
1013 dm->cnt_dm[BTC_DCNT_RPT_HANG] = 0;
1015 if (dm->cnt_dm[BTC_DCNT_RPT_HANG] >= BTC_CHK_HANG_MAX)
1016 dm->error.map.wl_fw_hang = true;
1018 dm->error.map.wl_fw_hang = false;
1020 dm->cnt_dm[BTC_DCNT_RPT] = cnt;
1023 if (dm->cnt_dm[BTC_DCNT_CYCLE] == cnt &&
1024 (dm->tdma_now.type != CXTDMA_OFF ||
1025 dm->tdma_now.ext_ctrl == CXECTL_EXT))
1026 dm->cnt_dm[BTC_DCNT_CYCLE_HANG]++;
1028 dm->cnt_dm[BTC_DCNT_CYCLE_HANG] = 0;
1030 if (dm->cnt_dm[BTC_DCNT_CYCLE_HANG] >= BTC_CHK_HANG_MAX)
1031 dm->error.map.cycle_hang = true;
1033 dm->error.map.cycle_hang = false;
1035 dm->cnt_dm[BTC_DCNT_CYCLE] = cnt;
1038 if (dm->cnt_dm[BTC_DCNT_W1] == cnt &&
1039 dm->tdma_now.type != CXTDMA_OFF)
1040 dm->cnt_dm[BTC_DCNT_W1_HANG]++;
1042 dm->cnt_dm[BTC_DCNT_W1_HANG] = 0;
1044 if (dm->cnt_dm[BTC_DCNT_W1_HANG] >= BTC_CHK_HANG_MAX)
1045 dm->error.map.w1_hang = true;
1047 dm->error.map.w1_hang = false;
1049 dm->cnt_dm[BTC_DCNT_W1] = cnt;
1052 if (dm->cnt_dm[BTC_DCNT_B1] == cnt &&
1053 dm->tdma_now.type != CXTDMA_OFF)
1054 dm->cnt_dm[BTC_DCNT_B1_HANG]++;
1056 dm->cnt_dm[BTC_DCNT_B1_HANG] = 0;
1058 if (dm->cnt_dm[BTC_DCNT_B1_HANG] >= BTC_CHK_HANG_MAX)
1059 dm->error.map.b1_hang = true;
1061 dm->error.map.b1_hang = false;
1063 dm->cnt_dm[BTC_DCNT_B1] = cnt;
1066 if (dm->cnt_dm[BTC_DCNT_E2G] == cnt &&
1067 dm->tdma_now.ext_ctrl == CXECTL_EXT)
1068 dm->cnt_dm[BTC_DCNT_E2G_HANG]++;
1070 dm->cnt_dm[BTC_DCNT_E2G_HANG] = 0;
1072 if (dm->cnt_dm[BTC_DCNT_E2G_HANG] >= BTC_CHK_HANG_MAX)
1073 dm->error.map.wl_e2g_hang = true;
1075 dm->error.map.wl_e2g_hang = false;
1077 dm->cnt_dm[BTC_DCNT_E2G] = cnt;
1081 dm->cnt_dm[BTC_DCNT_TDMA_NONSYNC]++;
1083 dm->cnt_dm[BTC_DCNT_TDMA_NONSYNC] = 0;
1085 if (dm->cnt_dm[BTC_DCNT_TDMA_NONSYNC] >= BTC_CHK_HANG_MAX)
1086 dm->error.map.tdma_no_sync = true;
1088 dm->error.map.tdma_no_sync = false;
1092 dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC]++;
1094 dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC] = 0;
1096 if (dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC] >= BTC_CHK_HANG_MAX)
1097 dm->error.map.slot_no_sync = true;
1099 dm->error.map.slot_no_sync = false;
1105 dm->cnt_dm[BTC_DCNT_BTTX_HANG]++;
1107 dm->cnt_dm[BTC_DCNT_BTTX_HANG] = 0;
1109 if (dm->cnt_dm[BTC_DCNT_BTTX_HANG] >= BTC_CHK_HANG_MAX)
1110 dm->error.map.bt_tx_hang = true;
1112 dm->error.map.bt_tx_hang = false;
1121 dm->cnt_dm[BTC_DCNT_BTCNT_HANG]++;
1123 dm->cnt_dm[BTC_DCNT_BTCNT_HANG] = 0;
1125 if ((dm->cnt_dm[BTC_DCNT_BTCNT_HANG] >= BTC_CHK_HANG_MAX &&
1126 bt->enable.now) || (!dm->cnt_dm[BTC_DCNT_BTCNT_HANG] &&
1132 dm->cnt_dm[BTC_DCNT_WL_SLOT_DRIFT]++;
1134 dm->cnt_dm[BTC_DCNT_WL_SLOT_DRIFT] = 0;
1136 if (dm->cnt_dm[BTC_DCNT_WL_SLOT_DRIFT] >= BTC_CHK_HANG_MAX)
1137 dm->error.map.wl_slot_drift = true;
1139 dm->error.map.wl_slot_drift = false;
1143 dm->cnt_dm[BTC_DCNT_BT_SLOT_DRIFT]++;
1145 dm->cnt_dm[BTC_DCNT_BT_SLOT_DRIFT] = 0;
1147 if (dm->cnt_dm[BTC_DCNT_BT_SLOT_DRIFT] >= BTC_CHK_HANG_MAX)
1148 dm->error.map.bt_slot_drift = true;
1150 dm->error.map.bt_slot_drift = false;
1297 struct rtw89_btc_dm *dm = &btc->dm;
1556 dm->wl_fw_cx_offload = !!prpt->v1.wl_fw_cx_offload;
1576 dm->wl_fw_cx_offload = !!le32_to_cpu(prpt->v4.wl_fw_info.cx_offload);
1579 memcpy(&dm->gnt.band[i], &prpt->v4.gnt_val[i],
1580 sizeof(dm->gnt.band[i]));
1602 dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout;
1608 dm->wl_fw_cx_offload = 0;
1611 memcpy(&dm->gnt.band[i], &prpt->v5.gnt_val[i][0],
1612 sizeof(dm->gnt.band[i]));
1629 dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout;
1635 dm->wl_fw_cx_offload = 0;
1638 memcpy(&dm->gnt.band[i], &prpt->v105.gnt_val[i][0],
1639 sizeof(dm->gnt.band[i]));
1656 dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout;
1664 memcpy(&dm->gnt.band[i], &prpt->v8.gnt_val[i][0],
1665 sizeof(dm->gnt.band[i]));
1687 dm->error.map.h2c_c2h_buffer_mismatch = true;
1689 dm->error.map.h2c_c2h_buffer_mismatch = false;
1703 sizeof(dm->tdma_now));
1706 memcmp(&dm->tdma_now,
1708 sizeof(dm->tdma_now)));
1711 memcmp(&dm->tdma_now,
1713 sizeof(dm->tdma_now)));
1722 sizeof(dm->slot_now.v7));
1724 memcmp(dm->slot_now.v7,
1726 sizeof(dm->slot_now.v7)));
1731 sizeof(dm->slot_now.v1));
1733 memcmp(dm->slot_now.v1,
1735 sizeof(dm->slot_now.v1)));
1744 le32_to_cpu(pcysta->v2.leakrx_cnt) != 0 && dm->tdma_now.rxflctrl) {
1747 dm->leak_ap = 1;
1751 if (dm->tdma_now.type == CXTDMA_OFF &&
1752 dm->tdma_now.ext_ctrl == CXECTL_EXT) {
1754 wl_slot_set = le16_to_cpu(dm->slot_now.v1[CXST_E2G].dur);
1756 wl_slot_set = le16_to_cpu(dm->slot_now.v7[CXST_E2G].dur);
1759 wl_slot_set = le16_to_cpu(dm->slot_now.v1[CXST_W1].dur);
1761 wl_slot_set = le16_to_cpu(dm->slot_now.v7[CXST_W1].dur);
1785 dm->tdma_now.rxflctrl) {
1787 dm->leak_ap = 1;
1791 if (dm->tdma_now.type == CXTDMA_OFF) {
1793 wl_slot_set = le16_to_cpu(dm->slot_now.v1[CXST_W1].dur);
1795 wl_slot_set = le16_to_cpu(dm->slot_now.v7[CXST_W1].dur);
1804 if (dm->tdma_now.type == CXTDMA_OFF &&
1805 dm->tdma_now.ext_ctrl == CXECTL_EXT &&
1829 dm->tdma_now.rxflctrl) {
1831 dm->leak_ap = 1;
1835 if (dm->tdma_now.type == CXTDMA_OFF) {
1837 wl_slot_set = le16_to_cpu(dm->slot_now.v1[CXST_W1].dur);
1839 wl_slot_set = le16_to_cpu(dm->slot_now.v7[CXST_W1].dur);
1848 if (dm->tdma_now.type == CXTDMA_OFF &&
1849 dm->tdma_now.ext_ctrl == CXECTL_EXT &&
1866 if (dm->fddt_train == BTC_FDDT_ENABLE)
1873 dm->tdma_now.rxflctrl) {
1876 dm->leak_ap = 1;
1880 if (dm->tdma_now.type == CXTDMA_OFF) {
1882 wl_slot_set = le16_to_cpu(dm->slot_now.v1[CXST_W1].dur);
1884 wl_slot_set = le16_to_cpu(dm->slot_now.v7[CXST_W1].dur);
1898 if (dm->tdma_now.type == CXTDMA_OFF &&
1899 dm->tdma_now.ext_ctrl == CXECTL_EXT &&
1917 if (dm->fddt_train == BTC_FDDT_ENABLE)
1922 if (dm->tdma_now.type != CXTDMA_OFF) {
1933 if (dm->tdma_now.rxflctrl &&
1935 dm->leak_ap = 1;
1936 } else if (dm->tdma_now.ext_ctrl == CXECTL_EXT) {
1948 dm->slot_req_more = 1;
1950 dm->slot_req_more = 0;
1973 if (dm->wl_btg_rx == BTC_BTGCTRL_BB_GNT_FWCTRL)
1974 dm->wl_btg_rx_rb = BTC_BTGCTRL_BB_GNT_FWCTRL;
1976 dm->wl_btg_rx_rb = val;
1979 if (dm->wl_pre_agc == BTC_PREAGC_BB_FWCTRL)
1980 dm->wl_pre_agc_rb = BTC_PREAGC_BB_FWCTRL;
1982 dm->wl_pre_agc_rb = val;
2034 struct rtw89_btc_dm *dm = &btc->dm;
2042 !memcmp(&dm->tdma, &dm->tdma_now, sizeof(dm->tdma))) {
2054 *v = dm->tdma;
2058 tlv_v7->len = sizeof(dm->tdma);
2061 memcpy(tlv_v7->val, &dm->tdma, tlv_v7->len);
2067 v3->tdma = dm->tdma;
2073 __func__, dm->tdma.type, dm->tdma.rxflctrl,
2074 dm->tdma.txpause, dm->tdma.wtgle_n, dm->tdma.leak_n,
2075 dm->tdma.ext_ctrl);
2081 struct rtw89_btc_dm *dm = &btc->dm;
2093 !memcmp(&dm->slot.v1[i], &dm->slot_now.v1[i],
2094 sizeof(dm->slot.v1[i])))
2106 v->slot = dm->slot.v1[i];
2110 __func__, i, dm->slot.v1[i].dur, dm->slot.v1[i].cxtbl,
2111 dm->slot.v1[i].cxtype);
2127 struct rtw89_btc_dm *dm = &btc->dm;
2133 !memcmp(&dm->slot.v7[i], &dm->slot_now.v7[i],
2134 sizeof(dm->slot.v7[i])))
2149 tlv->len = sizeof(dm->slot.v7[0]) + BTC_TLV_SLOT_ID_LEN_V7;
2160 memcpy(&btc->policy[len + 1], &dm->slot.v7[i],
2161 sizeof(dm->slot.v7[0]));
2166 __func__, btc->policy_len, i, dm->slot.v7[i].dur,
2167 dm->slot.v7[i].cxtype, dm->slot.v7[i].cxtbl);
2339 struct rtw89_btc_dm *dm = &btc->dm;
2343 len = sizeof(*tlv_v7) + sizeof(dm->slot.v7);
2350 tlv_v7->len = ARRAY_SIZE(dm->slot.v7);
2351 memcpy(tlv_v7->val, dm->slot.v7, sizeof(dm->slot.v7));
2364 memcpy(tbl->tbls, dm->slot.v1, flex_array_size(tbl, tbls, CXST_MAX));
2484 struct rtw89_btc_dm *dm = &btc->dm;
2486 /* use ring-structure to store dm step */
2487 dm->dm_step.step[dm->dm_step.step_pos] = reason_or_action;
2488 dm->dm_step.step_pos++;
2490 if (dm->dm_step.step_pos >= ARRAY_SIZE(dm->dm_step.step)) {
2491 dm->dm_step.step_pos = 0;
2492 dm->dm_step.step_ov = true;
2500 struct rtw89_btc_dm *dm = &btc->dm;
2503 dm->run_action = action;
2521 if (dm->tdma.rxflctrl == CXFLC_NULLP ||
2522 dm->tdma.rxflctrl == CXFLC_QOSNULL)
2533 memcpy(&dm->tdma_now, &dm->tdma, sizeof(dm->tdma_now));
2535 memcpy(&dm->slot_now.v7, &dm->slot.v7, sizeof(dm->slot_now.v7));
2537 memcpy(&dm->slot_now.v1, &dm->slot.v1, sizeof(dm->slot_now.v1));
2551 struct rtw89_btc_dm *dm = &btc->dm;
2553 struct rtw89_btc_rf_trx_para rf_para = dm->rf_trx_para;
2583 dm->trx_info.tx_power = u32_get_bits(rf_para.wl_tx_power,
2585 dm->trx_info.rx_gain = u32_get_bits(rf_para.wl_rx_gain,
2587 dm->trx_info.bt_tx_power = u32_get_bits(rf_para.bt_tx_power,
2589 dm->trx_info.bt_rx_gain = u32_get_bits(rf_para.bt_rx_gain,
2591 dm->trx_info.cn = wl->cn_report;
2592 dm->trx_info.nhm = wl->nhm.pwr;
2635 struct rtw89_btc_dm *dm = &btc->dm;
2636 struct rtw89_mac_ax_gnt *g = dm->gnt.band;
2677 rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt);
2684 struct rtw89_btc_dm *dm = &btc->dm;
2685 struct rtw89_mac_ax_gnt *g = dm->gnt.band;
2686 u8 i, bt_idx = dm->bt_select + 1;
2733 dm->gnt.bt[i].wlan_act_en = 0;
2734 dm->gnt.bt[i].wlan_act = 0;
2737 dm->gnt.bt[i].wlan_act_en = 1;
2738 dm->gnt.bt[i].wlan_act = 0;
2741 dm->gnt.bt[i].wlan_act_en = 1;
2742 dm->gnt.bt[i].wlan_act = 1;
2747 rtw89_mac_cfg_gnt_v2(rtwdev, &dm->gnt);
2780 btc->dm.rf_trx_para.wl_tx_power = level;
2811 btc->dm.rf_trx_para.wl_rx_gain = level;
2841 btc->dm.rf_trx_para.bt_tx_power = level;
2861 btc->dm.rf_trx_para.bt_rx_gain = level;
2880 struct rtw89_btc_dm *dm = &btc->dm;
2906 if ((btc->dm.wl_btg_rx && b->profile_cnt.now != 0) ||
2907 dm->bt_only == 1)
2908 dm->trx_para_level = 1; /* for better BT ACI issue */
2910 dm->trx_para_level = 0;
2912 dm->trx_para_level = 5;
2918 dm->trx_para_level = 6;
2920 dm->trx_para_level = 7;
2924 level_id = dm->trx_para_level;
2938 if (dm->fddt_train) {
2948 if (!bt->enable.now || dm->wl_only || wl_smap->rf_off ||
2957 if (wl_stb_chg != dm->wl_stb_chg) {
2958 dm->wl_stb_chg = wl_stb_chg;
2959 chip->ops->btc_wl_s1_standby(rtwdev, dm->wl_stb_chg);
3170 btc->dm.trx_para_level = 0;
3176 btc->dm.trx_para_level = 5;
3181 btc->dm.trx_para_level = 5;
3186 btc->dm.trx_para_level = 5;
3192 btc->dm.trx_para_level = 5;
3197 btc->dm.trx_para_level = 5;
3200 btc->dm.trx_para_level = 0;
3204 btc->dm.trx_para_level = 6;
3207 btc->dm.trx_para_level = 7;
3210 btc->dm.trx_para_level = 0;
3214 btc->dm.trx_para_level = 6;
3219 btc->dm.trx_para_level = 0;
3223 #define _tdma_set_flctrl(btc, flc) ({(btc)->dm.tdma.rxflctrl = flc; })
3224 #define _tdma_set_flctrl_role(btc, role) ({(btc)->dm.tdma.rxflctrl_role = role; })
3225 #define _tdma_set_tog(btc, wtg) ({(btc)->dm.tdma.wtgle_n = wtg; })
3226 #define _tdma_set_lek(btc, lek) ({(btc)->dm.tdma.leak_n = lek; })
3300 struct rtw89_btc_dm *dm = &btc->dm;
3301 struct rtw89_btc_fbtc_tdma *t = &dm->tdma;
3302 struct rtw89_btc_fbtc_slot *s = dm->slot.v1;
3442 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3444 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3499 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3501 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3523 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3525 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3560 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3562 _slot_set(btc, CXST_B4, dm->slot_dur[CXST_B4],
3597 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3599 _slot_set(btc, CXST_B4, dm->slot_dur[CXST_B4],
3611 struct rtw89_btc_dm *dm = &btc->dm;
3612 struct rtw89_btc_fbtc_tdma *t = &dm->tdma;
3630 if (dm->leak_ap &&
3805 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3807 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3844 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3846 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3871 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3873 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3898 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3900 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3938 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3940 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3942 _slot_set(btc, CXST_B4, dm->slot_dur[CXST_B4],
3980 _slot_set(btc, CXST_W1, dm->slot_dur[CXST_W1],
3982 _slot_set(btc, CXST_B1, dm->slot_dur[CXST_B1],
3984 _slot_set(btc, CXST_B4, dm->slot_dur[CXST_B4],
3993 if (wl_rinfo->link_mode == BTC_WLINK_2G_SCC && dm->tdma.rxflctrl) {
3994 null_role = FIELD_PREP(0x0f, dm->wl_scc.null_role1) |
3995 FIELD_PREP(0xf0, dm->wl_scc.null_role2);
4000 if (dm->leak_ap && dm->tdma.leak_n > 1)
4003 if (dm->tdma_instant_excute) {
4004 btc->dm.tdma.option_ctrl |= BIT(0);
4045 struct rtw89_btc_dm *dm = &btc->dm;
4063 if (btc->dm.run_reason == BTC_RSN_NTFY_POWEROFF ||
4064 btc->dm.run_reason == BTC_RSN_NTFY_RADIO_STATE ||
4065 btc->dm.run_reason == BTC_RSN_CMD_SET_COEX || dbcc_chg)
4068 if (!force_exec && ant_path_type == dm->set_ant_path) {
4077 } else if (btc->dm.run_reason != BTC_RSN_NTFY_WL_RFK &&
4084 dm->set_ant_path = ant_path_type;
4089 __func__, phy_map, dm->set_ant_path & 0xff);
4177 struct rtw89_btc_dm *dm = &btc->dm;
4180 if (btc->dm.run_reason == BTC_RSN_NTFY_POWEROFF ||
4181 btc->dm.run_reason == BTC_RSN_NTFY_RADIO_STATE ||
4182 btc->dm.run_reason == BTC_RSN_CMD_SET_COEX || wl_rinfo->dbcc_chg)
4186 btc->dm.wl_btg_rx == 2)
4189 if (!force_exec && ant_path_type == dm->set_ant_path) {
4198 } else if (btc->dm.run_reason != BTC_RSN_NTFY_WL_RFK &&
4205 dm->set_ant_path = ant_path_type;
4209 __func__, phy_map, dm->set_ant_path & 0xff);
4300 if (wl->status.map.rf_off || btc->dm.bt_only) {
4330 btc->dm.freerun = true;
4460 struct rtw89_btc_dm *dm = &btc->dm;
4466 if (a2dp.vendor_id == 0x4c || dm->leak_ap) {
4467 dm->slot_dur[CXST_W1] = 40;
4468 dm->slot_dur[CXST_B1] = 200;
4484 if (a2dp.vendor_id == 0x4c || dm->leak_ap) {
4485 dm->slot_dur[CXST_W1] = 40;
4486 dm->slot_dur[CXST_B1] = 200;
4561 struct rtw89_btc_dm *dm = &btc->dm;
4568 if (a2dp.vendor_id == 0x4c || dm->leak_ap) {
4569 dm->slot_dur[CXST_W1] = 40;
4570 dm->slot_dur[CXST_B1] = 200;
4587 if (a2dp.vendor_id == 0x4c || dm->leak_ap) {
4588 dm->slot_dur[CXST_W1] = 40;
4589 dm->slot_dur[CXST_B1] = 200;
4738 struct rtw89_btc_dm *dm = &btc->dm;
4740 u32 run_reason = btc->dm.run_reason;
4781 else if (dm->freerun)
4788 if (dm->wl_btg_rx_rb != dm->wl_btg_rx &&
4789 dm->wl_btg_rx_rb != BTC_BTGCTRL_BB_GNT_NOTFOUND) {
4791 dm->wl_btg_rx_rb = val;
4796 dm->wl_btg_rx_rb != dm->wl_btg_rx ||
4797 is_btg != dm->wl_btg_rx) {
4799 dm->wl_btg_rx = is_btg;
4817 struct rtw89_btc_dm *dm = &btc->dm;
4832 else if (dm->tdma_now.type != CXTDMA_OFF &&
4835 dm->fddt_train == BTC_FDDT_DISABLE)
4845 if (dm->wl_pre_agc_rb != dm->wl_pre_agc &&
4846 dm->wl_pre_agc_rb != BTC_PREAGC_NOTFOUND) {
4848 dm->wl_pre_agc_rb = val;
4852 (dm->run_reason == BTC_RSN_NTFY_INIT ||
4853 dm->run_reason == BTC_RSN_NTFY_SWBAND ||
4854 dm->wl_pre_agc_rb != dm->wl_pre_agc)) ||
4855 is_preagc != dm->wl_pre_agc) {
4856 dm->wl_pre_agc = is_preagc;
4860 chip->ops->ctrl_nbtg_bt_tx(rtwdev, dm->wl_pre_agc, RTW89_PHY_0);
4937 struct rtw89_btc_dm *dm = &btc->dm;
4972 if (btc->dm.freerun || igno_bt || b->profile_cnt.now == 0 ||
4991 if (dm->wl_tx_limit.enable == enable &&
4992 dm->wl_tx_limit.tx_time == tx_time &&
4993 dm->wl_tx_limit.tx_retry == tx_retry)
4996 if (!dm->wl_tx_limit.enable && enable)
4999 dm->wl_tx_limit.enable = enable;
5000 dm->wl_tx_limit.tx_time = tx_time;
5001 dm->wl_tx_limit.tx_retry = tx_retry;
5037 if (mode != BTC_WLINK_NOLINK && btc->dm.wl_btg_rx)
5060 struct rtw89_btc_dm *dm = &btc->dm;
5080 if (dm->run_reason == BTC_RSN_NTFY_INIT ||
5081 dm->run_reason == BTC_RSN_NTFY_RADIO_STATE ||
5082 dm->run_reason == BTC_RSN_NTFY_POWEROFF) {
5098 btc->dm.tdma_instant_excute = 0;
5205 btc->dm.e2g_slot_limit = BTC_E2G_LIMIT_DEF;
5274 struct rtw89_btc_dm *dm = &btc->dm;
5285 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5286 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_P2P_CLIENT;
5287 dm->wl_scc.ebt_null = 0; /* no ext-slot-control */
5291 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5292 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_STATION;
5293 dm->wl_scc.ebt_null = 0; /* no ext-slot-control */
5299 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5300 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_NONE;
5304 dm->wl_scc.ebt_null = 0;
5307 dm->wl_scc.ebt_null = 0;
5311 dm->wl_scc.ebt_null = 1; /* tx null at EBT */
5315 dm->wl_scc.ebt_null = 1; /* tx null at EBT */
5318 dm->wl_scc.ebt_null = 0;
5336 struct rtw89_btc_dm *dm = &btc->dm;
5347 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5348 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_P2P_CLIENT;
5349 dm->wl_scc.ebt_null = 0; /* no ext-slot-control */
5353 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5354 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_STATION;
5355 dm->wl_scc.ebt_null = 0; /* no ext-slot-control */
5361 dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION;
5362 dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_NONE;
5366 dm->wl_scc.ebt_null = 0;
5369 dm->wl_scc.ebt_null = 0;
5373 dm->wl_scc.ebt_null = 1; /* tx null at EBT */
5377 dm->wl_scc.ebt_null = 1; /* tx null at EBT */
5380 dm->wl_scc.ebt_null = 0;
5398 struct rtw89_btc_dm *dm = &btc->dm;
5412 dm->e2g_slot_limit = BTC_E2G_LIMIT_DEF;
6181 btc->dm.leak_ap = 0;
6321 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
6327 dm->cnt_notify[BTC_NCNT_TIMER]++;
6342 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
6347 dm->cnt_notify[BTC_NCNT_TIMER]++;
6358 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
6364 dm->cnt_notify[BTC_NCNT_TIMER]++;
6369 dm->error.map.wl_rfk_timeout = true;
6467 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
6479 dm->run_reason = reason;
6505 __func__, dm->wl_only, dm->bt_only);
6549 dm->freerun = false;
6550 dm->cnt_dm[BTC_DCNT_RUN]++;
6551 dm->fddt_train = BTC_FDDT_DISABLE;
6561 if (dm->wl_only) {
6567 if (wl->status.map.rf_off || wl->status.map.lps || dm->bt_only) {
6673 btc->dm.cnt_notify[BTC_NCNT_POWER_ON]++;
6682 btc->dm.cnt_notify[BTC_NCNT_POWER_OFF]++;
6701 struct rtw89_btc_dm *dm = &btc->dm;
6705 dm->init_info.init_v7.wl_only = (u8)dm->wl_only;
6706 dm->init_info.init_v7.bt_only = (u8)dm->bt_only;
6707 dm->init_info.init_v7.wl_init_ok = (u8)wl->status.map.init_ok;
6708 dm->init_info.init_v7.cx_other = btc->cx.other.type;
6709 dm->init_info.init_v7.wl_guard_ch = chip->afh_guard_ch;
6710 dm->init_info.init_v7.module = btc->mdinfo.md_v7;
6712 dm->init_info.init.wl_only = (u8)dm->wl_only;
6713 dm->init_info.init.bt_only = (u8)dm->bt_only;
6714 dm->init_info.init.wl_init_ok = (u8)wl->status.map.init_ok;
6715 dm->init_info.init.dbcc_en = rtwdev->dbcc_en;
6716 dm->init_info.init.cx_other = btc->cx.other.type;
6717 dm->init_info.init.wl_guard_ch = chip->afh_guard_ch;
6718 dm->init_info.init.module = btc->mdinfo.md;
6725 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
6731 btc->dm.run_reason = BTC_RSN_NONE;
6732 btc->dm.run_action = BTC_ACT_NONE;
6742 dm->cnt_notify[BTC_NCNT_INIT_COEX]++;
6743 dm->wl_only = mode == BTC_MODE_WL ? 1 : 0;
6744 dm->bt_only = mode == BTC_MODE_BT ? 1 : 0;
6754 dm->error.map.init = true;
6765 dm->error.map.pta_owner = true;
6790 btc->dm.cnt_notify[BTC_NCNT_SCAN_START]++;
6812 btc->dm.cnt_notify[BTC_NCNT_SCAN_FINISH]++;
6838 btc->dm.cnt_notify[BTC_NCNT_SWITCH_BAND]++;
6912 btc->dm.cnt_notify[BTC_NCNT_SPECIAL_PACKET]++;
6995 if (mode == BTC_WLINK_5G || rtwdev->btc.dm.freerun) {
7064 btc->dm.trx_info.bt_profile = u32_get_bits(btinfo.val, BT_PROFILE_PROTOCOL_MASK);
7082 btc->dm.trx_info.bt_rssi = bt->rssi_level;
7214 btc->dm.cnt_notify[BTC_NCNT_ROLE_INFO]++;
7252 btc->dm.leak_ap = 0;
7274 btc->dm.cnt_notify[BTC_NCNT_RADIO_STATE]++;
7319 btc->dm.cnt_dm[BTC_DCNT_BTCNT_HANG] = 0;
7320 btc->dm.tdma_instant_excute = 1;
7353 btc->dm.cnt_notify[BTC_NCNT_WL_RFK]++;
7390 __func__, btc->dm.cnt_notify[BTC_NCNT_WL_RFK], result);
7446 struct rtw89_btc_dm *dm = &btc->dm;
7535 dm->trx_info.tx_rate = link_info_t->tx_rate;
7536 dm->trx_info.rx_rate = link_info_t->rx_rate;
7552 dm->trx_info.tx_lvl = stats->tx_tfc_lv;
7553 dm->trx_info.rx_lvl = stats->rx_tfc_lv;
7554 dm->trx_info.tx_rate = rtwsta->ra_report.hw_rate;
7555 dm->trx_info.rx_rate = rtwsta->rx_hw_rate;
7558 dm->trx_info.tx_tp = link_info_t->tx_throughput;
7559 dm->trx_info.rx_tp = link_info_t->rx_throughput;
7562 if ((dm->wl_btg_rx_rb != dm->wl_btg_rx &&
7563 dm->wl_btg_rx_rb != BTC_BTGCTRL_BB_GNT_NOTFOUND) ||
7564 (dm->wl_pre_agc_rb != dm->wl_pre_agc &&
7565 dm->wl_pre_agc_rb != BTC_PREAGC_NOTFOUND))
7580 struct rtw89_btc_dm *dm = &btc->dm;
7590 btc->dm.cnt_notify[BTC_NCNT_WL_STA]++;
7599 if (dm->trx_info.wl_rssi != wl->rssi_level)
7600 dm->trx_info.wl_rssi = wl->rssi_level;
7613 } else if (btc->dm.cnt_notify[BTC_NCNT_WL_STA] >=
7614 btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST] + BTC_NHM_CHK_INTVL) {
7615 btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST] =
7616 btc->dm.cnt_notify[BTC_NCNT_WL_STA];
7617 } else if (btc->dm.cnt_notify[BTC_NCNT_WL_STA] <
7618 btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST]) {
7619 btc->dm.cnt_dm[BTC_DCNT_WL_STA_LAST] =
7620 btc->dm.cnt_notify[BTC_NCNT_WL_STA];
7671 btc->dm.cnt_dm[BTC_DCNT_CX_RUNINFO]++;
7685 struct rtw89_btc_dm *dm = &btc->dm;
7691 if (!(dm->coex_info_map & BTC_COEX_INFO_CX))
7694 dm->cnt_notify[BTC_NCNT_SHOW_COEX_INFO]++;
7837 if (!(btc->dm.coex_info_map & BTC_COEX_INFO_WL))
7941 if (!(btc->dm.coex_info_map & BTC_COEX_INFO_BT))
8399 struct rtw89_btc_dm *dm = &btc->dm;
8403 len = dm->dm_step.step_ov ? RTW89_BTC_DM_MAXSTEP : dm->dm_step.step_pos;
8404 start_idx = dm->dm_step.step_ov ? dm->dm_step.step_pos : 0;
8406 seq_print_segment(m, "[dm_steps]", dm->dm_step.step, len, 6, start_idx,
8407 ARRAY_SIZE(dm->dm_step.step));
8414 struct rtw89_btc_dm *dm = &btc->dm;
8419 if (!(dm->coex_info_map & BTC_COEX_INFO_DM))
8429 steps_to_str(dm->run_reason),
8430 steps_to_str(dm->run_action | BTC_ACT_EXT_BIT),
8431 id_to_ant(FIELD_GET(GENMASK(7, 0), dm->set_ant_path)),
8433 dm->cnt_dm[BTC_DCNT_RUN]);
8443 "[dm_flag]", dm->wl_only, dm->bt_only, igno_bt,
8444 dm->freerun, btc->lps, dm->wl_mimo_ps);
8446 seq_printf(m, "leak_ap:%d, fw_offload:%s%s\n", dm->leak_ap,
8448 (dm->wl_fw_cx_offload == BTC_CX_FW_OFFLOAD ?
8451 if (dm->rf_trx_para.wl_tx_power == 0xff)
8454 "[trx_ctrl]", wl->rssi_level, dm->trx_para_level);
8459 "[trx_ctrl]", wl->rssi_level, dm->trx_para_level,
8460 dm->rf_trx_para.wl_tx_power);
8464 dm->rf_trx_para.wl_rx_gain, dm->rf_trx_para.bt_tx_power,
8465 dm->rf_trx_para.bt_rx_gain,
8466 (bt->hi_lna_rx ? "Hi" : "Ori"), dm->wl_btg_rx);
8470 "[dm_ctrl]", dm->wl_tx_limit.enable, dm->wl_tx_limit.tx_time,
8471 dm->wl_tx_limit.tx_retry, btc->bt_req_len, bt->scan_rx_low_pri);
8578 struct rtw89_btc_dm *dm = &btc->dm;
8585 dur = le16_to_cpu(dm->slot_now.v1[i].dur);
8586 tbl = le32_to_cpu(dm->slot_now.v1[i].cxtbl);
8587 cxtype = le16_to_cpu(dm->slot_now.v1[i].cxtype);
8589 dur = le16_to_cpu(dm->slot_now.v7[i].dur);
8590 tbl = le32_to_cpu(dm->slot_now.v7[i].cxtbl);
8591 cxtype = le16_to_cpu(dm->slot_now.v7[i].cxtype);
8618 struct rtw89_btc_dm *dm = &btc->dm;
8647 if (dm->tdma_now.rxflctrl) {
8720 r.val = dm->tdma_now.rxflctrl;
8747 struct rtw89_btc_dm *dm = &btc->dm;
8776 if (dm->tdma_now.rxflctrl)
8877 struct rtw89_btc_dm *dm = &btc->dm;
8906 if (dm->tdma_now.rxflctrl)
9009 struct rtw89_btc_dm *dm = &btc->dm;
9038 if (dm->tdma_now.rxflctrl)
9141 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
9162 if (dm->tdma_now.rxflctrl)
9181 dm->bt_slot_flood, dm->cnt_dm[BTC_DCNT_BT_SLOT_FLOOD],
9274 if (!btc->dm.tdma_now.rxflctrl)
9483 if (!(btc->dm.coex_info_map & BTC_COEX_INFO_DM))
9608 if (!(btc->dm.coex_info_map & BTC_COEX_INFO_MREG))
9619 btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
9627 btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
9686 if (!(btc->dm.coex_info_map & BTC_COEX_INFO_MREG))
9697 btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
9705 btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
9760 struct rtw89_btc_dm *dm = &btc->dm;
9764 if (!(dm->coex_info_map & BTC_COEX_INFO_MREG))
9776 dm->pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
9782 dm->pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
9785 gnt = &dm->gnt.band[RTW89_PHY_0];
9792 gnt = &dm->gnt.band[RTW89_PHY_1];
9827 struct rtw89_btc_dm *dm = &btc->dm;
9830 u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify;
9833 if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
9851 prptctrl->rpt_enable, dm->error.val);
9853 if (dm->error.map.wl_fw_hang)
9887 dm->error.map.wl_rfk_timeout = bt->rfk_info.map.timeout;
9899 cnt_sum += dm->cnt_notify[i];
9931 struct rtw89_btc_dm *dm = &btc->dm;
9934 u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify;
9937 if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
9959 dm->error.val);
9961 if (dm->error.map.wl_fw_hang)
9999 dm->error.map.wl_rfk_timeout = bt->rfk_info.map.timeout;
10011 cnt_sum += dm->cnt_notify[i];
10043 struct rtw89_btc_dm *dm = &btc->dm;
10045 u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify;
10048 if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
10071 if (dm->error.map.wl_fw_hang)
10123 cnt_sum += dm->cnt_notify[i];
10158 struct rtw89_btc_dm *dm = &btc->dm;
10160 u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify;
10163 if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
10186 if (dm->error.map.wl_fw_hang)
10238 cnt_sum += dm->cnt_notify[i];
10272 struct rtw89_btc_dm *dm = &rtwdev->btc.dm;
10274 u32 *cnt = rtwdev->btc.dm.cnt_notify;
10278 if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
10302 if (dm->error.map.wl_fw_hang)
10341 cnt_sum += dm->cnt_notify[i];