Lines Matching refs:rtw_write32_mask

379 	rtw_write32_mask(rtwdev, 0x1d58, 0xff8, 0x1ff);
380 rtw_write32_mask(rtwdev, 0x1a00, 0x3, 0x2);
381 rtw_write32_mask(rtwdev, 0x1a14, 0x300, 0x3);
383 rtw_write32_mask(rtwdev, 0x180c, 0x3, 0x0);
384 rtw_write32_mask(rtwdev, 0x410c, 0x3, 0x0);
389 rtw_write32_mask(rtwdev, 0x1e24, BIT(31), 0x0);
390 rtw_write32_mask(rtwdev, 0x1e28, 0xf, 0x3);
418 rtw_write32_mask(rtwdev, base_addr + 0x30, BIT(30), 0x0);
523 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xf0000000, 0x0);
524 rtw_write32_mask(rtwdev, base_addr + 0xc0, 0xf, 0x8);
525 rtw_write32_mask(rtwdev, base_addr + 0xd8, 0xf0000000, 0x0);
526 rtw_write32_mask(rtwdev, base_addr + 0xdc, 0xf, 0x8);
586 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xf0000000, ic & 0xf);
587 rtw_write32_mask(rtwdev, base_addr + 0xc0, 0xf, (ic & 0xf0) >> 4);
591 rtw_write32_mask(rtwdev, base_addr + 0xd8, 0xf0000000, qc & 0xf);
592 rtw_write32_mask(rtwdev, base_addr + 0xdc, 0xf, (qc & 0xf0) >> 4);
595 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xe, 0x6);
608 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xe, 0x3);
648 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0x1, 0x0);
649 rtw_write32_mask(rtwdev, base_addr + 0x30, BIT(30), 0x1);
663 rtw_write32_mask(rtwdev, w_addr, 0xf0000000, i);
726 rtw_write32_mask(rtwdev, 0x1860, 0xfc000000, 0x3c);
731 rtw_write32_mask(rtwdev, 0x4160, 0xfc000000, 0x3c);
750 rtw_write32_mask(rtwdev, REG_DCKA_I_0, 0xf0000000, val);
752 rtw_write32_mask(rtwdev, REG_DCKA_I_1, 0xf, val);
756 rtw_write32_mask(rtwdev, REG_DCKA_Q_0, 0xf0000000, val);
758 rtw_write32_mask(rtwdev, REG_DCKA_Q_1, 0xf, val);
762 rtw_write32_mask(rtwdev, REG_DCKB_I_0, 0xf0000000, val);
764 rtw_write32_mask(rtwdev, REG_DCKB_I_1, 0xf, val);
768 rtw_write32_mask(rtwdev, REG_DCKB_Q_0, 0xf0000000, val);
770 rtw_write32_mask(rtwdev, REG_DCKB_Q_1, 0xf, val);
777 rtw_write32_mask(rtwdev, 0x18b0, BIT(27), 0x0);
778 rtw_write32_mask(rtwdev, 0x18cc, BIT(27), 0x0);
779 rtw_write32_mask(rtwdev, 0x41b0, BIT(27), 0x0);
780 rtw_write32_mask(rtwdev, 0x41cc, BIT(27), 0x0);
782 rtw_write32_mask(rtwdev, 0x1830, BIT(30), 0x0);
783 rtw_write32_mask(rtwdev, 0x1860, 0xfc000000, 0x3c);
784 rtw_write32_mask(rtwdev, 0x18b4, BIT(0), 0x1);
785 rtw_write32_mask(rtwdev, 0x18d0, BIT(0), 0x1);
787 rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x0);
788 rtw_write32_mask(rtwdev, 0x4160, 0xfc000000, 0x3c);
789 rtw_write32_mask(rtwdev, 0x41b4, BIT(0), 0x1);
790 rtw_write32_mask(rtwdev, 0x41d0, BIT(0), 0x1);
792 rtw_write32_mask(rtwdev, 0x18b0, 0xf00, 0x0);
793 rtw_write32_mask(rtwdev, 0x18c0, BIT(14), 0x0);
794 rtw_write32_mask(rtwdev, 0x18cc, 0xf00, 0x0);
795 rtw_write32_mask(rtwdev, 0x18dc, BIT(14), 0x0);
797 rtw_write32_mask(rtwdev, 0x18b0, BIT(0), 0x0);
798 rtw_write32_mask(rtwdev, 0x18cc, BIT(0), 0x0);
799 rtw_write32_mask(rtwdev, 0x18b0, BIT(0), 0x1);
800 rtw_write32_mask(rtwdev, 0x18cc, BIT(0), 0x1);
804 rtw_write32_mask(rtwdev, 0x18c0, 0x38000, 0x7);
805 rtw_write32_mask(rtwdev, 0x18dc, 0x38000, 0x7);
806 rtw_write32_mask(rtwdev, 0x41c0, 0x38000, 0x7);
807 rtw_write32_mask(rtwdev, 0x41dc, 0x38000, 0x7);
809 rtw_write32_mask(rtwdev, 0x18b8, BIT(26) | BIT(25), 0x1);
810 rtw_write32_mask(rtwdev, 0x18d4, BIT(26) | BIT(25), 0x1);
812 rtw_write32_mask(rtwdev, 0x41b0, 0xf00, 0x0);
813 rtw_write32_mask(rtwdev, 0x41c0, BIT(14), 0x0);
814 rtw_write32_mask(rtwdev, 0x41cc, 0xf00, 0x0);
815 rtw_write32_mask(rtwdev, 0x41dc, BIT(14), 0x0);
817 rtw_write32_mask(rtwdev, 0x41b0, BIT(0), 0x0);
818 rtw_write32_mask(rtwdev, 0x41cc, BIT(0), 0x0);
819 rtw_write32_mask(rtwdev, 0x41b0, BIT(0), 0x1);
820 rtw_write32_mask(rtwdev, 0x41cc, BIT(0), 0x1);
822 rtw_write32_mask(rtwdev, 0x41b8, BIT(26) | BIT(25), 0x1);
823 rtw_write32_mask(rtwdev, 0x41d4, BIT(26) | BIT(25), 0x1);
832 rtw_write32_mask(rtwdev, toggle_addr, BIT(26) | BIT(25), 0x0);
833 rtw_write32_mask(rtwdev, toggle_addr, BIT(26) | BIT(25), 0x2);
861 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x0);
863 rtw_write32_mask(rtwdev, w_i + 0x4, 0xff8, value);
864 rtw_write32_mask(rtwdev, w_i, 0xf0000000, i);
865 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x1);
868 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x0);
874 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x0);
876 rtw_write32_mask(rtwdev, w_q + 0x4, 0xff8, value);
877 rtw_write32_mask(rtwdev, w_q, 0xf0000000, i);
878 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x1);
880 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x0);
882 rtw_write32_mask(rtwdev, w_i + 0x8, BIT(26) | BIT(25), 0x0);
883 rtw_write32_mask(rtwdev, w_q + 0x8, BIT(26) | BIT(25), 0x0);
884 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(0), 0x0);
885 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(0), 0x0);
929 rtw_write32_mask(rtwdev, 0x1830, BIT(30), 0x1);
930 rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x1);
933 rtw_write32_mask(rtwdev, 0x18b0, BIT(27), 0x1);
934 rtw_write32_mask(rtwdev, 0x18cc, BIT(27), 0x1);
935 rtw_write32_mask(rtwdev, 0x41b0, BIT(27), 0x1);
936 rtw_write32_mask(rtwdev, 0x41cc, BIT(27), 0x1);
993 rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x1);
1089 rtw_write32_mask(rtwdev, REG_DIS_DPD, DIS_DPD_MASK, DIS_DPD_RATEALL);
1184 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path);
1185 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, BIT_PS_EN,
1237 rtw_write32_mask(rtwdev, REG_TX_FIFO, BIT_STOP_TX, 0x2);
1251 rtw_write32_mask(rtwdev, REG_ENFN, BIT_IQK_DPK_EN, 0x1);
1252 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2,
1254 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2,
1256 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, BIT_EN_IOQ_IQK_DPK, 0x1);
1257 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, BIT_TST_IQK2SET_SRC, 0x0);
1258 rtw_write32_mask(rtwdev, REG_CCA_OFF, BIT_CCA_ON_BY_PW, 0x1ff);
1261 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_A,
1263 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_DIS_SHARERX_TXGAT, 0x1);
1264 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_A,
1266 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_3WIRE_EN, 0x0);
1268 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_B,
1270 rtw_write32_mask(rtwdev, REG_3WIRE2,
1272 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_B,
1274 rtw_write32_mask(rtwdev, REG_3WIRE2, BIT_3WIRE_EN, 0x0);
1276 rtw_write32_mask(rtwdev, REG_CCKSB, BIT_BBMODE, 0x2);
1294 rtw_write32_mask(rtwdev, REG_IQK_CTRL, MASKDWORD, MASKDWORD);
1295 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700f0001);
1296 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700f0001);
1297 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x701f0001);
1298 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x702f0001);
1299 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x703f0001);
1300 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x704f0001);
1301 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x705f0001);
1302 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x706f0001);
1303 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x707f0001);
1304 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x708f0001);
1305 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x709f0001);
1306 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70af0001);
1307 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70bf0001);
1308 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70cf0001);
1309 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70df0001);
1310 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ef0001);
1311 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ff0001);
1312 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ff0001);
1329 rtw_write32_mask(rtwdev, REG_IQK_CTRL, MASKDWORD, 0xffa1005e);
1330 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700b8041);
1331 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70144041);
1332 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70244041);
1333 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70344041);
1334 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70444041);
1335 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x705b8041);
1336 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70644041);
1337 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x707b8041);
1338 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x708b8041);
1339 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x709b8041);
1340 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ab8041);
1341 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70bb8041);
1342 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70cb8041);
1343 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70db8041);
1344 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70eb8041);
1345 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70fb8041);
1356 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x0);
1357 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0);
1358 rtw_write32_mask(rtwdev, REG_SINGLE_TONE_SW, BIT_IRQ_TEST_MODE, 0x0);
1359 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, 0x00);
1360 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x1);
1361 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0);
1362 rtw_write32_mask(rtwdev, REG_SINGLE_TONE_SW, BIT_IRQ_TEST_MODE, 0x0);
1363 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, 0x00);
1364 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x0);
1365 rtw_write32_mask(rtwdev, REG_CCA_OFF, BIT_CCA_ON_BY_PW, 0x0);
1368 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_A,
1370 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_DIS_SHARERX_TXGAT, 0x0);
1371 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_A,
1373 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_3WIRE_EN, 0x3);
1375 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_B,
1377 rtw_write32_mask(rtwdev, REG_3WIRE2,
1379 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_B,
1381 rtw_write32_mask(rtwdev, REG_3WIRE2, BIT_3WIRE_EN, 0x3);
1384 rtw_write32_mask(rtwdev, REG_CCKSB, BIT_BBMODE, 0x0);
1385 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_CFIR_EN, 0x5);
1404 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path);
1408 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x0);
1411 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x2);
1414 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x3);
1417 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x4);
1423 rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, MASKBYTE0, 0x88);
1440 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN, tmp_3f);
1441 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_I_GAIN, gain);
1442 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_GAIN_RST, 0x1);
1443 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_GAIN_RST, 0x0);
1485 rtw_write32_mask(rtwdev, REG_ANTMAP0, BIT_ANT_PATH, path + 1);
1486 rtw_write32_mask(rtwdev, REG_TXLGMAP, MASKDWORD, 0xe4e40000);
1487 rtw_write32_mask(rtwdev, REG_TXANTSEG, BIT_ANTSEG, 0x3);
1488 rtw_write32_mask(rtwdev, path_setting[path], MASK20BITS, 0x33312);
1489 rtw_write32_mask(rtwdev, path_setting[path], BIT_PATH_EN, 0x1);
1490 rtw_write32_mask(rtwdev, set_pi[path], BITS_RFC_DIRECT, 0x0);
1493 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path);
1494 rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x0);
1496 rtw_write32_mask(rtwdev, REG_TX_TONE_IDX, MASKBYTE0, 0x018);
1499 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, BIT_2G_SWING);
1501 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, BIT_5G_SWING);
1504 rtw_write32_mask(rtwdev, REG_NCTL0, MASKDWORD, cfg1_1b00[path]);
1505 rtw_write32_mask(rtwdev, REG_NCTL0, MASKDWORD, cfg2_1b00[path]);
1511 rtw_write32_mask(rtwdev, set_pi[path], BITS_RFC_DIRECT, 0x2);
1512 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path);
1513 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_EN, 0x1);
1514 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_SEL, 0x12);
1515 rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, BIT_GAPK_RPT_IDX, 0x3);
1527 rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, BIT_GAPK_RPT_IDX, 0x4);
1558 rtw_write32_mask(rtwdev,
1560 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path);
1561 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x3f);
1562 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0);
1573 rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x00);
1574 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x0);
1580 rtw_write32_mask(rtwdev,
1582 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path);
1583 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x3f);
1584 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0);
1598 rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x0);
1601 rtw_write32_mask(rtwdev,
1604 rtw_write32_mask(rtwdev,
1607 rtw_write32_mask(rtwdev,
1749 rtw_write32_mask(rtwdev,
1774 rtw_write32_mask(rtwdev,
1881 rtw_write32_mask(rtwdev, REG_DIS_DPD, DIS_DPD_MASK, DIS_DPD_RATEALL);
1889 rtw_write32_mask(rtwdev, REG_ANAPAR_XTAL_0, 0xfffc00,
2182 rtw_write32_mask(rtwdev, REG_RSTB, BIT_RSTB_3WIRE, 0x1);
2183 rtw_write32_mask(rtwdev, REG_ANAPAR_A, BIT_ANAPAR_UPDATE, 0x1);
2184 rtw_write32_mask(rtwdev, REG_ANAPAR_B, BIT_ANAPAR_UPDATE, 0x1);
2186 rtw_write32_mask(rtwdev, REG_RSTB, BIT_RSTB_3WIRE, 0x0);
2261 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f, igi - 2);
2262 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f00, igi - 2);
2263 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f, igi);
2264 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f00, igi);
2275 rtw_write32_mask(rtwdev, REG_CCAMSK, 0x3F000000, 0xF);
2279 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_CCK,
2281 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_CCK,
2283 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM,
2285 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM,
2289 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_CCK,
2291 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_CCK,
2293 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM,
2295 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM,
2300 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x969);
2302 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x96a);
2304 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x9aa);
2306 rtw_write32_mask(rtwdev, REG_TXF0, MASKHWORD, 0x3da0);
2307 rtw_write32_mask(rtwdev, REG_TXF1, MASKDWORD,
2309 rtw_write32_mask(rtwdev, REG_TXF2, MASKLWORD, 0x6aa3);
2310 rtw_write32_mask(rtwdev, REG_TXF3, MASKHWORD, 0xaa7b);
2311 rtw_write32_mask(rtwdev, REG_TXF4, MASKLWORD, 0xf3d7);
2312 rtw_write32_mask(rtwdev, REG_TXF5, MASKDWORD, 0x0);
2313 rtw_write32_mask(rtwdev, REG_TXF6, MASKDWORD,
2315 rtw_write32_mask(rtwdev, REG_TXF7, MASKDWORD, 0xffff);
2317 rtw_write32_mask(rtwdev, REG_TXF0, MASKHWORD, 0x5284);
2318 rtw_write32_mask(rtwdev, REG_TXF1, MASKDWORD,
2320 rtw_write32_mask(rtwdev, REG_TXF2, MASKLWORD, 0x0a88);
2321 rtw_write32_mask(rtwdev, REG_TXF3, MASKHWORD, 0xacc4);
2322 rtw_write32_mask(rtwdev, REG_TXF4, MASKLWORD, 0xc8b2);
2323 rtw_write32_mask(rtwdev, REG_TXF5, MASKDWORD,
2325 rtw_write32_mask(rtwdev, REG_TXF6, MASKDWORD,
2327 rtw_write32_mask(rtwdev, REG_TXF7, MASKDWORD,
2331 rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x3);
2333 rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x1);
2339 rtw_write32_mask(rtwdev, REG_CCAMSK, 0x3F000000, 0x22);
2340 rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x3);
2342 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM,
2344 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM,
2347 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM,
2349 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM,
2352 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM,
2354 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM,
2359 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x494);
2361 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x493);
2363 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x453);
2365 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x452);
2367 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x412);
2369 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x411);
2374 rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x19B);
2375 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x0);
2376 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x0);
2377 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x7);
2378 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x6);
2379 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0);
2380 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1);
2381 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0);
2384 rtw_write32_mask(rtwdev, REG_CCKSB, BIT(4),
2386 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x5);
2387 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xc0, 0x0);
2388 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xff00,
2390 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x1);
2391 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1);
2392 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x1);
2395 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0xa);
2396 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xc0, 0x0);
2397 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xff00,
2399 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x6);
2400 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x1);
2403 rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x2AB);
2404 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x0);
2405 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x1);
2406 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x4);
2407 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x4);
2408 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0);
2409 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1);
2410 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0);
2413 rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x2AB);
2414 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x0);
2415 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x2);
2416 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x6);
2417 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x5);
2418 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0);
2419 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1);
2420 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0);
2437 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00060000, 0x0);
2438 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00600000, 0x0);
2440 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00600000, 0x1);
2441 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00060000, 0x1);
2445 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0x0f000000, 0x0);
2447 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0x0f000000, 0x5);
2449 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0x0f000000, 0x1);
2455 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x300, 0x0);
2456 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x600000, 0x0);
2457 rtw_write32_mask(rtwdev, REG_AGCSWSH, BIT(17), 0x0);
2458 rtw_write32_mask(rtwdev, REG_ANTWTPD, BIT(20), 0x0);
2459 rtw_write32_mask(rtwdev, REG_MRCM, BIT(24), 0x0);
2461 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x300, 0x1);
2462 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x600000, 0x1);
2463 rtw_write32_mask(rtwdev, REG_AGCSWSH, BIT(17), 0x1);
2464 rtw_write32_mask(rtwdev, REG_ANTWTPD, BIT(20), 0x1);
2465 rtw_write32_mask(rtwdev, REG_MRCM, BIT(24), 0x1);
2468 rtw_write32_mask(rtwdev, 0x824, 0x0f000000, rx_path);
2469 rtw_write32_mask(rtwdev, 0x824, 0x000f0000, rx_path);
2482 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x8);
2484 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x4);
2487 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0xc);
2489 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x8);
2498 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x11);
2499 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xff, 0x0);
2501 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x12);
2502 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xff, 0x0);
2505 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x33);
2506 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0404);
2508 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x32);
2509 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0400);
2511 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x31);
2512 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0400);
2532 rtw_write32_mask(rtwdev, REG_ORITXCODE, MASK20BITS, 0x33312);
2534 rtw_write32_mask(rtwdev, REG_ORITXCODE, MASK20BITS, 0x11111);
2536 rtw_write32_mask(rtwdev, REG_ORITXCODE2, MASK20BITS, 0x33312);
2538 rtw_write32_mask(rtwdev, REG_ORITXCODE2, MASK20BITS, 0x11111);
2741 rtw_write32_mask(rtwdev, 0x1c90, BIT(15), 0);
2742 rtw_write32_mask(rtwdev, txref_cck[path], 0x7f0000,
2746 rtw_write32_mask(rtwdev, 0x1c90, BIT(15), 0);
2747 rtw_write32_mask(rtwdev, txref_ofdm[path], 0x1fc00,
2769 rtw_write32_mask(rtwdev, 0x1c90, BIT(15), 0x0);
2770 rtw_write32_mask(rtwdev, offset_txagc + rate_idx, MASKDWORD,
2908 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_CCK_FA_RST, 0);
2909 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_CCK_FA_RST, 2);
2910 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_OFDM_FA_RST, 0);
2911 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_OFDM_FA_RST, 2);
3205 rtw_write32_mask(rtwdev, p->addr, p->bitmask, p->data);
3215 rtw_write32_mask(rtwdev, 0x70, BIT(26), 0x1);
3229 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc);
3230 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_DPD_CLK, 0x4);
3328 rtw_write32_mask(rtwdev, 0x1e70, 0xf, 0x2);
3363 rtw_write32_mask(rtwdev, REG_DPD_LUT0, BIT_GLOSS_DB, 0x4);
3364 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x3);
3366 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc);
3442 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(12), 0x1);
3443 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(12), 0x0);
3444 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_SEL, 0x0);
3451 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE,
3453 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x9);
3463 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE,
3465 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x0);
3479 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc);
3480 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, 0x00ff0000, 0x0);
3502 rtw_write32_mask(rtwdev, 0x1b48, BIT(14), 0x0);
3550 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
3551 rtw_write32_mask(rtwdev, 0x1b48, BIT(14), 0x1);
3556 rtw_write32_mask(rtwdev, 0x1b48, BIT(14), 0x0);
3786 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(24), 0x0);
3789 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(24), 0x1);
3842 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
3899 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
3915 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
3916 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_BYPASS_DPD, 0x0);
3917 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0);
3918 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x9);
3919 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_INNER_LB, 0x1);
3920 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc);
3921 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_DPD_CLK, 0xf);
3924 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF,
3926 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, BIT_DPD_EN, 0x1);
3928 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF,
3930 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S1, BIT_DPD_EN, 0x1);
3951 rtw_write32_mask(rtwdev, REG_DPD_CTL0, MASKBYTE3, 0x8 | path);
3955 rtw_write32_mask(rtwdev, REG_DPD_CTL15, MASKBYTE3, 0x0);
3956 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
3957 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x0);
3958 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_INNER_LB, 0x0);
3959 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc);
3962 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF, 0x5b);
3964 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF, 0x5b);
3966 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_SEL, 0x0);
3973 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF, tmp_gs);
3975 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF, tmp_gs);
3987 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x0000000c);
3995 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x0000000c);
4000 rtw_write32_mask(rtwdev, 0x1b18 + offset[path], MASKHWORD,
4002 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path],
4004 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path],
4006 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path],
4008 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0 + offset[path],
4019 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
4020 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0);
4052 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE,
4054 rtw_write32_mask(rtwdev, 0x1b58, 0x0000007f, 0x0);
4100 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc);
4102 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, BIT_DPD_EN,
4104 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S1, BIT_DPD_EN,
4108 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, mask, 0x0);
4112 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S1, mask, 0x0);
4128 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE,
4142 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc);
4145 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF,
4148 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF,
4247 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE,
4249 rtw_write32_mask(rtwdev, 0x1b58, GENMASK(6, 0),
4265 rtw_write32_mask(rtwdev, REG_ANAPAR_XTAL_0, BIT_XCAP_0, val);
4417 rtw_write32_mask(rtwdev,
4421 rtw_write32_mask(rtwdev,
4468 rtw_write32_mask(rtwdev, 0x18a0, PWR_TRACK_MASK,
4472 rtw_write32_mask(rtwdev, 0x41a0, PWR_TRACK_MASK,