realtek/rtw88/rtw8821c.c

135 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
139 		dm_info->default_ofdm_index = 24;
141 		dm_info->default_ofdm_index = swing_idx;
143 	ewma_thermal_init(&dm_info->avg_thermal[RF_PATH_A]);
144 	dm_info->delta_power_index[RF_PATH_A] = 0;
145 	dm_info->delta_power_index_last[RF_PATH_A] = 0;
146 	dm_info->pwr_trk_triggered = false;
147 	dm_info->pwr_trk_init_trigger = true;
148 	dm_info->thermal_meter_k = rtwdev->efuse.thermal_meter_k;
200 	rtwdev->dm_info.cck_pd_default = rtw_read8(rtwdev, REG_CSRATIO) & 0x1f;
616 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
628 	dm_info->rssi[RF_PATH_A] = pkt_stat->rssi;
636 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
656 	dm_info->rssi[RF_PATH_A] = pkt_stat->rssi;
763 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
774 	dm_info->cck_fa_cnt = cck_fa_cnt;
775 	dm_info->ofdm_fa_cnt = ofdm_fa_cnt;
776 	dm_info->total_fa_cnt = ofdm_fa_cnt;
778 		dm_info->total_fa_cnt += cck_fa_cnt;
781 	dm_info->cck_ok_cnt = FIELD_GET(GENMASK(15, 0), crc32_cnt);
782 	dm_info->cck_err_cnt = FIELD_GET(GENMASK(31, 16), crc32_cnt);
785 	dm_info->ofdm_ok_cnt = FIELD_GET(GENMASK(15, 0), crc32_cnt);
786 	dm_info->ofdm_err_cnt = FIELD_GET(GENMASK(31, 16), crc32_cnt);
789 	dm_info->ht_ok_cnt = FIELD_GET(GENMASK(15, 0), crc32_cnt);
790 	dm_info->ht_err_cnt = FIELD_GET(GENMASK(31, 16), crc32_cnt);
793 	dm_info->vht_ok_cnt = FIELD_GET(GENMASK(15, 0), crc32_cnt);
794 	dm_info->vht_err_cnt = FIELD_GET(GENMASK(31, 16), crc32_cnt);
797 	dm_info->ofdm_cca_cnt = FIELD_GET(GENMASK(31, 16), cca32_cnt);
798 	dm_info->total_cca_cnt = dm_info->ofdm_cca_cnt;
801 		dm_info->cck_cca_cnt = FIELD_GET(GENMASK(15, 0), cca32_cnt);
802 		dm_info->total_cca_cnt += dm_info->cck_cca_cnt;
1050 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1051 	s8 delta_pwr_idx = dm_info->delta_power_index[RF_PATH_A];
1052 	u8 swing_upper_bound = dm_info->default_ofdm_index + 10;
1056 	u8 swing_index = dm_info->default_ofdm_index;
1064 			swing_index = dm_info->default_ofdm_index;
1067 			swing_index = dm_info->default_ofdm_index +
1074 			swing_index = dm_info->default_ofdm_index;
1076 			if (dm_info->default_ofdm_index >
1078 				swing_index = dm_info->default_ofdm_index +
1111 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1117 	u8 tx_rate = dm_info->tx_rate;
1133 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1146 	if (dm_info->pwr_trk_init_trigger)
1147 		dm_info->pwr_trk_init_trigger = false;
1156 	dm_info->delta_power_index[RF_PATH_A] =
1159 	if (dm_info->delta_power_index[RF_PATH_A] ==
1160 			dm_info->delta_power_index_last[RF_PATH_A])
1163 		dm_info->delta_power_index_last[RF_PATH_A] =
1164 			dm_info->delta_power_index[RF_PATH_A];
1175 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1180 	if (!dm_info->pwr_trk_triggered) {
1183 		dm_info->pwr_trk_triggered = true;
1188 	dm_info->pwr_trk_triggered = false;
1224 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1229 		dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A], new_lvl);
1231 	if (dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A] == new_lvl)
1239 		dm_info->cck_pd_default + new_lvl * 2,
1240 		pd[new_lvl], dm_info->cck_fa_avg);
1242 	dm_info->cck_fa_avg = CCK_FA_AVG_RESET;
1244 	dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A] = new_lvl;
1247 			 dm_info->cck_pd_default + new_lvl * 2);