Lines Matching refs:tx_rings

167 		tx_ring = &rtwpci->tx_rings[i];
328 tx_ring = &rtwpci->tx_rings[i];
350 tx_ring = &rtwpci->tx_rings[i];
404 dma = rtwpci->tx_rings[RTW_TX_QUEUE_BCN].r.dma;
408 len = rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.len;
409 dma = rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.dma;
410 rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.rp = 0;
411 rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.wp = 0;
416 len = rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.len;
417 dma = rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.dma;
418 rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.rp = 0;
419 rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.wp = 0;
423 len = rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.len;
424 dma = rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.dma;
425 rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.rp = 0;
426 rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.wp = 0;
430 len = rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.len;
431 dma = rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.dma;
432 rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.rp = 0;
433 rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.wp = 0;
437 len = rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.len;
438 dma = rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.dma;
439 rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.rp = 0;
440 rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.wp = 0;
444 len = rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.len;
445 dma = rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.dma;
446 rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.rp = 0;
447 rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.wp = 0;
451 len = rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.len;
452 dma = rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.dma;
453 rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.rp = 0;
454 rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.wp = 0;
543 tx_ring = &rtwpci->tx_rings[queue];
622 tx_ring = &rtwpci->tx_rings[queue];
714 struct rtw_pci_tx_ring *ring = &rtwpci->tx_rings[pci_q];
778 ring = &rtwpci->tx_rings[queue];
815 ring = &rtwpci->tx_rings[queue];
928 ring = &rtwpci->tx_rings[queue];
952 ring = &rtwpci->tx_rings[hw_queue];