Lines Matching refs:coex_stat

41 	struct rtw_coex_stat *coex_stat = &coex->stat;
48 if (coex_stat->wl_tx_limit_en == tx_limit_en &&
49 coex_stat->wl_ampdu_limit_en == ampdu_limit_en)
52 if (!coex_stat->wl_tx_limit_en) {
53 coex_stat->darfrc = rtw_read32(rtwdev, REG_DARFRC);
54 coex_stat->darfrch = rtw_read32(rtwdev, REG_DARFRCH);
55 coex_stat->retry_limit = rtw_read16(rtwdev, REG_RETRY_LIMIT);
58 if (!coex_stat->wl_ampdu_limit_en)
59 coex_stat->ampdu_max_time =
62 coex_stat->wl_tx_limit_en = tx_limit_en;
63 coex_stat->wl_ampdu_limit_en = ampdu_limit_en;
85 rtw_write16(rtwdev, REG_RETRY_LIMIT, coex_stat->retry_limit);
86 rtw_write32(rtwdev, REG_DARFRC, coex_stat->darfrc);
87 rtw_write32(rtwdev, REG_DARFRCH, coex_stat->darfrch);
94 coex_stat->ampdu_max_time);
116 struct rtw_coex_stat *coex_stat = &coex->stat;
121 if (coex_stat->bt_disabled)
124 if (efuse->share_ant || ant_distance <= 5 || !coex_stat->wl_gl_busy)
127 if (ant_distance >= 40 || coex_stat->bt_hid_pair_num >= 2)
135 if (coex_stat->wl_tput_dir == COEX_WL_TPUT_TX)
142 coex_stat->cnt_wl[COEX_CNT_WL_SCANAP] <= 5)
151 struct rtw_coex_stat *coex_stat = &coex->stat;
160 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0;
162 coex_stat->wl_slot_extend = enable;
169 struct rtw_coex_stat *coex_stat = &coex->stat;
175 if (coex_stat->tdma_timer_base == 3 && coex_stat->wl_slot_extend) {
182 if (coex_stat->wl_slot_extend && coex_stat->wl_force_lps_ctrl &&
183 !coex_stat->wl_cck_lock_ever) {
184 if (coex_stat->wl_fw_dbg_info[7] <= 5)
185 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND]++;
187 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0;
191 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND]);
193 if (coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] == 7) {
198 } else if (!coex_stat->wl_slot_extend && coex_stat->wl_cck_lock) {
209 struct rtw_coex_stat *coex_stat = &coex->stat;
214 if (coex_stat->wl_coex_mode != COEX_WLINK_2G1PORT &&
215 coex_stat->wl_coex_mode != COEX_WLINK_2GFREE)
219 coex_stat->bt_setup_link) {
220 coex_stat->wl_cck_lock = false;
221 coex_stat->wl_cck_lock_pre = false;
225 if (coex_stat->wl_rx_rate <= COEX_CCK_2 ||
226 coex_stat->wl_rts_rx_rate <= COEX_CCK_2)
229 if (coex_stat->wl_connected && coex_stat->wl_gl_busy &&
235 coex_stat->wl_cck_lock = true;
241 coex_stat->wl_cck_lock = false;
247 coex_stat->wl_cck_lock = false;
251 if (coex_stat->wl_cck_lock && !coex_stat->wl_cck_lock_pre)
255 coex_stat->wl_cck_lock_pre = coex_stat->wl_cck_lock;
261 struct rtw_coex_stat *coex_stat = &coex->stat;
269 if (!coex_stat->wl_gl_busy && !wl_cck_lock) {
271 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] < 5)
272 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2]++;
274 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] == 5) {
275 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] = 0;
276 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] = 0;
279 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] < 5)
280 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0]++;
282 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] == 5) {
283 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] = 0;
284 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] = 0;
287 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] < 5)
288 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1]++;
290 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] == 5) {
291 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] = 0;
292 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] = 0;
296 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] == 5)
297 coex_stat->wl_noisy_level = 2;
298 else if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] == 5)
299 coex_stat->wl_noisy_level = 1;
301 coex_stat->wl_noisy_level = 0;
304 coex_stat->wl_noisy_level);
311 struct rtw_coex_stat *coex_stat = &coex->stat;
314 u16 tbtt_interval = coex_stat->wl_beacon_interval;
316 if (coex_stat->tdma_timer_base == type)
319 coex_stat->tdma_timer_base = type;
351 if (coex_stat->tdma_timer_base == 3)
370 struct rtw_coex_stat *coex_stat = &coex->stat;
376 val |= coex_stat->score_board;
393 if (val != coex_stat->score_board) {
394 coex_stat->score_board = val;
415 struct rtw_coex_stat *coex_stat = &coex->stat;
422 coex_stat->bt_iqk_state != 0xff) {
445 coex_stat->bt_iqk_state = 0xff;
452 struct rtw_coex_stat *coex_stat = &coex->stat;
454 if (coex_stat->bt_disabled)
470 struct rtw_coex_stat *coex_stat = &coex->stat;
474 coex_stat->hi_pri_tx = FIELD_GET(MASKLWORD, tmp);
475 coex_stat->hi_pri_rx = FIELD_GET(MASKHWORD, tmp);
478 coex_stat->lo_pri_tx = FIELD_GET(MASKLWORD, tmp);
479 coex_stat->lo_pri_rx = FIELD_GET(MASKHWORD, tmp);
486 coex_stat->hi_pri_rx, coex_stat->hi_pri_tx,
487 coex_stat->lo_pri_rx, coex_stat->lo_pri_tx);
494 struct rtw_coex_stat *coex_stat = &coex->stat;
504 if (coex_stat->bt_disabled != bt_disabled) {
507 coex_stat->bt_disabled, bt_disabled);
509 coex_stat->bt_disabled = bt_disabled;
510 coex_stat->bt_ble_scan_type = 0;
513 if (!coex_stat->bt_disabled) {
514 coex_stat->bt_reenable = true;
519 coex_stat->bt_mailbox_reply = false;
520 coex_stat->bt_reenable = false;
529 struct rtw_coex_stat *coex_stat = &coex->stat;
541 coex_stat->wl_connected = !!rtwdev->sta_cnt;
544 if (wl_busy != coex_stat->wl_gl_busy) {
546 coex_stat->wl_gl_busy = true;
554 coex_stat->wl_tput_dir = COEX_WL_TPUT_TX;
556 coex_stat->wl_tput_dir = COEX_WL_TPUT_RX;
560 coex_stat->wl_linkscan_proc = true;
562 coex_stat->wl_linkscan_proc = false;
575 if (coex_stat->wl_linkscan_proc || coex_stat->wl_hi_pri_task1 ||
576 coex_stat->wl_hi_pri_task2 || coex_stat->wl_gl_busy)
710 struct rtw_coex_stat *coex_stat = &coex->stat;
721 rssi = coex_stat->bt_rssi;
727 if (coex_stat->bt_ble_scan_en &&
728 coex_stat->cnt_bt[COEX_CNT_BT_INFOUPDATE] % 3 == 0) {
732 coex_stat->bt_ble_scan_type = scan_type;
733 if ((coex_stat->bt_ble_scan_type & 0x1) == 0x1)
734 coex_stat->bt_init_scan = true;
736 coex_stat->bt_init_scan = false;
740 coex_stat->bt_profile_num = 0;
743 if (!(coex_stat->bt_info_lb2 & COEX_INFO_CONNECTION)) {
744 coex_stat->bt_link_exist = false;
745 coex_stat->bt_pan_exist = false;
746 coex_stat->bt_a2dp_exist = false;
747 coex_stat->bt_hid_exist = false;
748 coex_stat->bt_hfp_exist = false;
751 coex_stat->bt_link_exist = true;
752 if (coex_stat->bt_info_lb2 & COEX_INFO_FTP) {
753 coex_stat->bt_pan_exist = true;
754 coex_stat->bt_profile_num++;
756 coex_stat->bt_pan_exist = false;
759 if (coex_stat->bt_info_lb2 & COEX_INFO_A2DP) {
760 coex_stat->bt_a2dp_exist = true;
761 coex_stat->bt_profile_num++;
763 coex_stat->bt_a2dp_exist = false;
766 if (coex_stat->bt_info_lb2 & COEX_INFO_HID) {
767 coex_stat->bt_hid_exist = true;
768 coex_stat->bt_profile_num++;
770 coex_stat->bt_hid_exist = false;
773 if (coex_stat->bt_info_lb2 & COEX_INFO_SCO_ESCO) {
774 coex_stat->bt_hfp_exist = true;
775 coex_stat->bt_profile_num++;
777 coex_stat->bt_hfp_exist = false;
781 if (coex_stat->bt_info_lb2 & COEX_INFO_INQ_PAGE) {
783 } else if (!(coex_stat->bt_info_lb2 & COEX_INFO_CONNECTION)) {
785 coex_stat->bt_multi_link_remain = false;
786 } else if (coex_stat->bt_info_lb2 == COEX_INFO_CONNECTION) {
788 } else if ((coex_stat->bt_info_lb2 & COEX_INFO_SCO_ESCO) ||
789 (coex_stat->bt_info_lb2 & COEX_INFO_SCO_BUSY)) {
790 if (coex_stat->bt_info_lb2 & COEX_INFO_ACL_BUSY)
794 } else if (coex_stat->bt_info_lb2 & COEX_INFO_ACL_BUSY) {
800 coex_stat->cnt_bt[COEX_CNT_BT_INFOUPDATE]++;
811 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
824 coex_stat->wl_coex_mode != COEX_WLINK_2GFREE)) {
894 struct rtw_coex_stat *coex_stat = &coex->stat;
897 if (coex->freerun && coex_stat->cnt_wl[COEX_CNT_WL_SCANAP] <= 5)
965 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
967 if (!force && state == coex_stat->wl_mimo_ps)
970 coex_stat->wl_mimo_ps = state;
974 rtw_coex_update_wl_ch_info(rtwdev, (u8)coex_stat->wl_connected);
1019 struct rtw_coex_stat *coex_stat = &coex->stat;
1030 coex_stat->wl_toggle_interval = interval;
1033 coex_stat->wl_toggle_para[i] = cur_h2c_para[i];
1071 struct rtw_coex_stat *coex_stat = &coex->stat;
1089 if (coex_stat->wl_slot_toggle_change)
1107 struct rtw_coex_stat *coex_stat = &coex->stat;
1115 coex_stat->wl_force_lps_ctrl = false;
1121 coex_stat->wl_force_lps_ctrl = true;
1140 struct rtw_coex_stat *coex_stat = &coex->stat;
1157 coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) {
1185 coex_stat->wl_slot_toggle = true;
1186 coex_stat->wl_slot_toggle_change = false;
1188 coex_stat->wl_slot_toggle_change = coex_stat->wl_slot_toggle;
1189 coex_stat->wl_slot_toggle = false;
1198 struct rtw_coex_stat *coex_stat = &coex->stat;
1224 if ((coex_stat->bt_a2dp_exist &&
1225 (coex_stat->bt_inq_remain || coex_stat->bt_multi_link)) ||
1262 struct rtw_coex_stat *coex_stat = &coex->stat;
1277 "[BTCoex], coex_stat->bt_disabled = 0x%x\n",
1278 coex_stat->bt_disabled);
1285 if (coex_stat->bt_disabled)
1296 if (coex_stat->bt_disabled) {
1462 struct rtw_coex_stat *coex_stat = &coex->stat;
1466 if (coex_stat->bt_hfp_exist)
1468 if (coex_stat->bt_hid_exist)
1470 if (coex_stat->bt_a2dp_exist)
1472 if (coex_stat->bt_pan_exist)
1505 if (coex_stat->bt_multi_link) {
1506 if (coex_stat->bt_hid_pair_num > 0)
1553 struct rtw_coex_stat *coex_stat = &coex->stat;
1585 if (coex_stat->wl_tput_dir == COEX_WL_TPUT_TX)
1648 struct rtw_coex_stat *coex_stat = &coex->stat;
1659 if (coex_stat->wl_gl_busy) {
1661 if (coex_stat->bt_hid_exist &&
1662 coex_stat->bt_profile_num == 1) {
1673 if (coex_stat->wl_gl_busy)
1688 struct rtw_coex_stat *coex_stat = &coex->stat;
1701 coex_stat->wl_gl_busy) {
1719 if (!coex_stat->wl_gl_busy) {
1725 if (coex_stat->lo_pri_rx + coex_stat->lo_pri_tx > 250)
1735 if (!coex_stat->wl_gl_busy) {
1738 } else if ((coex_stat->bt_ble_scan_type & 0x2) &&
1757 struct rtw_coex_stat *coex_stat = &coex->stat;
1767 if (coex_stat->wl_linkscan_proc || coex_stat->wl_hi_pri_task1 ||
1768 coex_stat->wl_hi_pri_task2)
1778 if (coex_stat->bt_profile_num > 0)
1780 else if (coex_stat->wl_hi_pri_task1)
1782 else if (!coex_stat->bt_page)
1786 } else if (coex_stat->wl_gl_busy) {
1789 if (coex_stat->bt_profile_num == 0) {
1792 } else if (coex_stat->bt_profile_num == 1 &&
1793 !coex_stat->bt_a2dp_exist) {
1802 } else if (coex_stat->wl_connected) {
1820 if (coex_stat->bt_profile_num > 0)
1822 else if (coex_stat->wl_hi_pri_task1)
1824 else if (!coex_stat->bt_page)
1828 } else if (coex_stat->wl_gl_busy) {
1833 } else if (coex_stat->wl_connected) {
1847 wl_hi_pri, coex_stat->bt_page);
1857 struct rtw_coex_stat *coex_stat = &coex->stat;
1866 coex_stat->wl_coex_mode = COEX_WLINK_2GFREE;
1867 if (coex_stat->bt_whck_test)
1869 else if (coex_stat->wl_linkscan_proc || coex_stat->bt_hid_exist)
1871 else if (coex_stat->bt_setup_link || coex_stat->bt_inq_page)
1873 else if (coex_stat->bt_a2dp_exist)
1888 if (coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) {
1889 if (coex_stat->wl_tput_dir == COEX_WL_TPUT_TX)
1905 struct rtw_coex_stat *coex_stat = &coex->stat;
1919 if (coex_stat->bt_multi_link) {
1936 struct rtw_coex_stat *coex_stat = &coex->stat;
1948 if (coex_stat->bt_ble_exist) {
1950 if (coex_stat->cnt_wl[COEX_CNT_WL_SCANAP] > 5) {
1959 if (coex_stat->bt_profile_num == 1 &&
1960 (coex_stat->bt_multi_link ||
1961 (coex_stat->lo_pri_rx +
1962 coex_stat->lo_pri_tx > 360) ||
1963 coex_stat->bt_slave ||
1968 } else if (coex_stat->bt_a2dp_active) {
1971 } else if (coex_stat->bt_418_hid_exist &&
1972 coex_stat->wl_gl_busy) {
1977 } else if (coex_stat->bt_ble_hid_exist &&
1978 coex_stat->wl_gl_busy) {
1988 if (coex_stat->bt_ble_exist) {
1990 if (coex_stat->cnt_wl[COEX_CNT_WL_SCANAP] > 5) {
1997 } else if (coex_stat->bt_a2dp_active) {
2019 struct rtw_coex_stat *coex_stat = &coex->stat;
2034 if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0)
2039 if (coex_stat->wl_connecting || !coex_stat->wl_gl_busy)
2061 struct rtw_coex_stat *coex_stat = &coex->stat;
2075 } else if (coex_stat->wl_gl_busy) {
2100 struct rtw_coex_stat *coex_stat = &coex->stat;
2110 if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0)
2115 if (coex_stat->wl_gl_busy)
2123 if (coex_stat->wl_gl_busy)
2137 struct rtw_coex_stat *coex_stat = &coex->stat;
2152 if (coex_stat->bt_ble_exist) {
2154 } else if (coex_stat->bt_418_hid_exist) {
2161 if (coex_stat->wl_connecting || !coex_stat->wl_gl_busy) {
2163 } else if (coex_stat->bt_418_hid_exist) {
2171 if (coex_stat->bt_ble_exist)
2194 struct rtw_coex_stat *coex_stat = &coex->stat;
2206 if (coex_stat->wl_gl_busy) {
2217 if (coex_stat->wl_gl_busy &&
2218 coex_stat->wl_noisy_level == 0)
2223 if (coex_stat->wl_gl_busy)
2232 if (coex_stat->wl_gl_busy)
2251 struct rtw_coex_stat *coex_stat = &coex->stat;
2264 if (coex_stat->wl_gl_busy)
2272 if (coex_stat->wl_gl_busy)
2286 struct rtw_coex_stat *coex_stat = &coex->stat;
2298 if (coex_stat->wl_gl_busy)
2306 if (coex_stat->wl_gl_busy)
2321 struct rtw_coex_stat *coex_stat = &coex->stat;
2331 if (coex_stat->bt_game_hid_exist && coex_stat->wl_linkscan_proc)
2332 coex_stat->wl_coex_mode = COEX_WLINK_2GFREE;
2377 struct rtw_coex_stat *coex_stat = &coex->stat;
2397 if (coex_stat->bt_game_hid_exist) {
2398 coex_stat->wl_coex_mode = COEX_WLINK_2GFREE;
2399 if (coex_stat->wl_tput_dir == COEX_WL_TPUT_TX)
2415 struct rtw_coex_stat *coex_stat = &coex->stat;
2425 if (coex_stat->bt_a2dp_exist) {
2428 if (coex_stat->wl_gl_busy)
2437 if (coex_stat->bt_a2dp_exist) {
2478 struct rtw_coex_stat *coex_stat = &coex->stat;
2498 else if (coex_stat->bt_a2dp_sink)
2533 struct rtw_coex_stat *coex_stat = &coex->stat;
2563 if (coex_stat->wl_under_ips) {
2570 !coex_stat->bt_setup_link) {
2576 coex_stat->cnt_wl[COEX_CNT_WL_COEXRUN]++;
2581 coex_stat->wl_coex_mode = COEX_WLINK_5G;
2587 coex_stat->wl_coex_mode = COEX_WLINK_2G1PORT;
2589 if (coex_stat->bt_disabled) {
2590 if (coex_stat->wl_connected && rf4ce_en)
2592 else if (!coex_stat->wl_connected)
2599 if (coex_stat->wl_under_lps && !coex_stat->wl_force_lps_ctrl) {
2604 if (coex_stat->bt_game_hid_exist && coex_stat->wl_connected) {
2609 if (coex_stat->bt_whck_test) {
2614 if (coex_stat->bt_setup_link) {
2619 if (coex_stat->bt_inq_page) {
2626 coex_stat->wl_connected) {
2631 if (coex_stat->wl_linkscan_proc && !coex->freerun) {
2636 if (coex_stat->wl_connected) {
2647 if (coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) {
2657 rtw_coex_gnt_workaround(rtwdev, false, coex_stat->wl_coex_mode);
2664 struct rtw_coex_stat *coex_stat = &coex->stat;
2669 memset(coex_stat, 0, sizeof(*coex_stat));
2672 coex_stat->cnt_wl[i] = 0;
2675 coex_stat->cnt_bt[i] = 0;
2683 coex_stat->wl_coex_mode = COEX_WLINK_MAX;
2684 coex_stat->wl_rx_rate = DESC_RATE5_5M;
2685 coex_stat->wl_rts_rx_rate = DESC_RATE5_5M;
2691 struct rtw_coex_stat *coex_stat = &coex->stat;
2697 coex_stat->kt_ver = u8_get_bits(rtw_read8(rtwdev, 0xf1), GENMASK(7, 4));
2700 rtw_coex_wl_slot_extend(rtwdev, coex_stat->wl_slot_extend);
2782 struct rtw_coex_stat *coex_stat = &coex->stat;
2790 coex_stat->wl_under_ips = true;
2804 coex_stat->wl_under_ips = false;
2811 struct rtw_coex_stat *coex_stat = &coex->stat;
2819 coex_stat->wl_under_lps = true;
2821 if (coex_stat->wl_force_lps_ctrl) {
2834 coex_stat->wl_under_lps = false;
2839 if (!coex_stat->wl_force_lps_ctrl)
2849 struct rtw_coex_stat *coex_stat = &coex->stat;
2867 coex_stat->wl_hi_pri_task2 = true;
2873 coex_stat->cnt_wl[COEX_CNT_WL_SCANAP] = 30; /* To do */
2877 coex_stat->cnt_wl[COEX_CNT_WL_SCANAP]);
2879 coex_stat->wl_hi_pri_task2 = false;
2913 struct rtw_coex_stat *coex_stat = &coex->stat;
2933 coex_stat->wl_hi_pri_task1 = true;
2934 coex_stat->wl_connecting = true;
2935 coex_stat->cnt_wl[COEX_CNT_WL_CONNPKT] = 2;
2936 coex_stat->wl_connecting = true;
2954 coex_stat->wl_hi_pri_task1 = false;
2956 coex_stat->wl_connecting = false;
2967 struct rtw_coex_stat *coex_stat = &coex->stat;
2982 coex_stat->wl_connecting = false;
3006 struct rtw_coex_stat *coex_stat = &coex->stat;
3015 coex_stat->cnt_bt_info_c2h[rsp_source]++;
3018 coex_stat->bt_iqk_state = buf[1];
3019 if (coex_stat->bt_iqk_state == 0)
3020 coex_stat->cnt_bt[COEX_CNT_BT_IQK]++;
3021 else if (coex_stat->bt_iqk_state == 2)
3022 coex_stat->cnt_bt[COEX_CNT_BT_IQKFAIL]++;
3037 if (coex_stat->bt_disabled != coex_stat->bt_disabled_pre) {
3038 coex_stat->bt_disabled_pre = coex_stat->bt_disabled;
3064 if (coex_stat->bt_disabled) {
3065 coex_stat->bt_disabled = false;
3066 coex_stat->bt_reenable = true;
3087 coex_stat->bt_info_c2h[rsp_source][i] = buf[i];
3090 if (coex_stat->bt_info_c2h[rsp_source][1] == coex_stat->bt_info_lb2 &&
3091 coex_stat->bt_info_c2h[rsp_source][2] == coex_stat->bt_info_lb3 &&
3092 coex_stat->bt_info_c2h[rsp_source][3] == coex_stat->bt_info_hb0 &&
3093 coex_stat->bt_info_c2h[rsp_source][4] == coex_stat->bt_info_hb1 &&
3094 coex_stat->bt_info_c2h[rsp_source][5] == coex_stat->bt_info_hb2 &&
3095 coex_stat->bt_info_c2h[rsp_source][6] == coex_stat->bt_info_hb3) {
3101 coex_stat->bt_info_lb2 = coex_stat->bt_info_c2h[rsp_source][1];
3102 coex_stat->bt_info_lb3 = coex_stat->bt_info_c2h[rsp_source][2];
3103 coex_stat->bt_info_hb0 = coex_stat->bt_info_c2h[rsp_source][3];
3104 coex_stat->bt_info_hb1 = coex_stat->bt_info_c2h[rsp_source][4];
3105 coex_stat->bt_info_hb2 = coex_stat->bt_info_c2h[rsp_source][5];
3106 coex_stat->bt_info_hb3 = coex_stat->bt_info_c2h[rsp_source][6];
3109 coex_stat->bt_whck_test = (coex_stat->bt_info_lb2 == 0xff);
3111 inq_page = ((coex_stat->bt_info_lb2 & BIT(2)) == BIT(2));
3113 if (inq_page != coex_stat->bt_inq_page) {
3115 coex_stat->bt_inq_page = inq_page;
3118 coex_stat->bt_inq_remain = true;
3124 coex_stat->bt_acl_busy = ((coex_stat->bt_info_lb2 & BIT(3)) == BIT(3));
3126 if (coex_stat->bt_info_lb2 & BIT(5)) {
3127 if (coex_stat->bt_info_hb1 & BIT(0)) {
3129 coex_stat->bt_ble_hid_exist = true;
3131 coex_stat->bt_ble_hid_exist = false;
3133 coex_stat->bt_ble_exist = false;
3134 } else if (coex_stat->bt_info_hb1 & BIT(0)) {
3136 coex_stat->bt_ble_hid_exist = false;
3137 coex_stat->bt_ble_exist = true;
3139 coex_stat->bt_ble_hid_exist = false;
3140 coex_stat->bt_ble_exist = false;
3143 if (coex_stat->bt_info_hb1 & BIT(0)) {
3144 if (coex_stat->bt_hid_slot == 1 &&
3145 coex_stat->hi_pri_rx + 100 < coex_stat->hi_pri_tx &&
3146 coex_stat->hi_pri_rx < 100) {
3147 coex_stat->bt_ble_hid_exist = true;
3148 coex_stat->bt_ble_exist = false;
3150 coex_stat->bt_ble_hid_exist = false;
3151 coex_stat->bt_ble_exist = true;
3154 coex_stat->bt_ble_hid_exist = false;
3155 coex_stat->bt_ble_exist = false;
3159 coex_stat->cnt_bt[COEX_CNT_BT_RETRY] = coex_stat->bt_info_lb3 & 0xf;
3160 if (coex_stat->cnt_bt[COEX_CNT_BT_RETRY] >= 1)
3161 coex_stat->cnt_bt[COEX_CNT_BT_POPEVENT]++;
3163 coex_stat->bt_fix_2M = ((coex_stat->bt_info_lb3 & BIT(4)) == BIT(4));
3164 coex_stat->bt_inq = ((coex_stat->bt_info_lb3 & BIT(5)) == BIT(5));
3165 if (coex_stat->bt_inq)
3166 coex_stat->cnt_bt[COEX_CNT_BT_INQ]++;
3168 coex_stat->bt_page = ((coex_stat->bt_info_lb3 & BIT(7)) == BIT(7));
3169 if (coex_stat->bt_page)
3170 coex_stat->cnt_bt[COEX_CNT_BT_PAGE]++;
3174 coex_stat->bt_rssi = coex_stat->bt_info_hb0 * 2 + 10;
3176 if (coex_stat->bt_info_hb0 <= 127)
3177 coex_stat->bt_rssi = 100;
3178 else if (256 - coex_stat->bt_info_hb0 <= 100)
3179 coex_stat->bt_rssi = 100 - (256 - coex_stat->bt_info_hb0);
3181 coex_stat->bt_rssi = 0;
3184 if (coex_stat->bt_info_hb1 & BIT(1))
3185 coex_stat->cnt_bt[COEX_CNT_BT_REINIT]++;
3187 if (coex_stat->bt_info_hb1 & BIT(2)) {
3188 coex_stat->cnt_bt[COEX_CNT_BT_SETUPLINK]++;
3189 coex_stat->bt_setup_link = true;
3190 if (coex_stat->bt_reenable)
3203 if (coex_stat->bt_info_hb1 & BIT(3))
3204 coex_stat->cnt_bt[COEX_CNT_BT_IGNWLANACT]++;
3206 coex_stat->bt_ble_voice = ((coex_stat->bt_info_hb1 & BIT(4)) == BIT(4));
3207 coex_stat->bt_ble_scan_en = ((coex_stat->bt_info_hb1 & BIT(5)) == BIT(5));
3208 if (coex_stat->bt_info_hb1 & BIT(6))
3209 coex_stat->cnt_bt[COEX_CNT_BT_ROLESWITCH]++;
3211 coex_stat->bt_multi_link = ((coex_stat->bt_info_hb1 & BIT(7)) == BIT(7));
3214 if (!coex_stat->bt_multi_link && coex_stat->bt_multi_link_pre) {
3215 coex_stat->bt_multi_link_remain = true;
3220 coex_stat->bt_multi_link_pre = coex_stat->bt_multi_link;
3223 if (coex_stat->bt_info_hb1 & BIT(1)) {
3227 if (coex_stat->wl_connected)
3235 if ((coex_stat->bt_info_hb1 & BIT(3)) &&
3236 (!(coex_stat->bt_info_hb1 & BIT(2)))) {
3242 coex_stat->bt_opp_exist = ((coex_stat->bt_info_hb2 & BIT(0)) == BIT(0));
3243 if (coex_stat->bt_info_hb2 & BIT(1))
3244 coex_stat->cnt_bt[COEX_CNT_BT_AFHUPDATE]++;
3246 coex_stat->bt_a2dp_active = (coex_stat->bt_info_hb2 & BIT(2)) == BIT(2);
3247 coex_stat->bt_slave = ((coex_stat->bt_info_hb2 & BIT(3)) == BIT(3));
3248 coex_stat->bt_hid_slot = (coex_stat->bt_info_hb2 & 0x30) >> 4;
3249 coex_stat->bt_hid_pair_num = (coex_stat->bt_info_hb2 & 0xc0) >> 6;
3250 if (coex_stat->bt_hid_pair_num > 0 && coex_stat->bt_hid_slot >= 2)
3251 coex_stat->bt_418_hid_exist = true;
3252 else if (coex_stat->bt_hid_pair_num == 0 || coex_stat->bt_hid_slot == 1)
3253 coex_stat->bt_418_hid_exist = false;
3255 if ((coex_stat->bt_info_lb2 & 0x49) == 0x49)
3256 coex_stat->bt_a2dp_bitpool = (coex_stat->bt_info_hb3 & 0x7f);
3258 coex_stat->bt_a2dp_bitpool = 0;
3260 coex_stat->bt_a2dp_sink = ((coex_stat->bt_info_hb3 & BIT(7)) == BIT(7));
3274 struct rtw_coex_stat *coex_stat = &coex->stat;
3290 hl = &coex_stat->hid_handle_list;
3294 coex_stat->hid_handle_list = *bhl;
3295 memset(&coex_stat->hid_info, 0, sizeof(coex_stat->hid_info));
3297 hidinfo = &coex_stat->hid_info[i];
3307 hidinfo = &coex_stat->hid_info[i];
3319 hidinfo = &coex_stat->hid_info[i];
3351 if (cur_game_hid_exist != coex_stat->bt_game_hid_exist) {
3352 coex_stat->bt_game_hid_exist = cur_game_hid_exist;
3355 coex_stat->bt_game_hid_exist);
3364 struct rtw_coex_stat *coex_stat = &coex->stat;
3369 if (!chip->wl_mimo_ps_support || coex_stat->wl_under_ips ||
3370 (coex_stat->wl_under_lps && !coex_stat->wl_force_lps_ctrl))
3373 if (!coex_stat->bt_hid_exist &&
3374 !((coex_stat->bt_info_lb2 & COEX_INFO_CONNECTION) &&
3375 (coex_stat->hi_pri_tx + coex_stat->hi_pri_rx >
3382 hidinfo = &coex_stat->hid_info[i];
3398 struct rtw_coex_stat *coex_stat = &coex->stat;
3412 val = coex_stat->wl_fw_dbg_info_pre[i];
3414 coex_stat->wl_fw_dbg_info[i] = buf[i] - val;
3416 coex_stat->wl_fw_dbg_info[i] = 255 - val + buf[i];
3418 coex_stat->wl_fw_dbg_info_pre[i] = buf[i];
3421 coex_stat->cnt_wl[COEX_CNT_WL_FW_NOTIFY]++;
3433 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
3435 if ((coex_stat->wl_under_lps && !coex_stat->wl_force_lps_ctrl) ||
3436 coex_stat->wl_under_ips)
3446 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
3449 coex_stat->bt_setup_link = false;
3458 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
3461 coex_stat->bt_reenable = false;
3470 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
3474 coex_stat->wl_hi_pri_task1 = false;
3483 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
3486 coex_stat->wl_gl_busy = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
3495 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
3498 coex_stat->bt_inq_remain = coex_stat->bt_inq_page;
3507 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
3510 coex_stat->wl_connecting = false;
3520 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
3523 coex_stat->bt_multi_link_remain = false;
3531 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
3534 coex_stat->wl_cck_lock = false;
3915 struct rtw_coex_stat *coex_stat = &coex->stat;
3929 score_board_WB = coex_stat->score_board;
3940 if (!coex_stat->wl_under_ips &&
3941 (!coex_stat->wl_under_lps || coex_stat->wl_force_lps_ctrl) &&
3942 !coex_stat->bt_disabled && !coex_stat->bt_mailbox_reply) {
3944 &coex_stat->bt_supported_version);
3945 rtw_coex_get_bt_patch_version(rtwdev, &coex_stat->patch_ver);
3947 &coex_stat->bt_supported_feature);
3948 rtw_coex_get_bt_reg(rtwdev, 3, 0xae, &coex_stat->bt_reg_vendor_ae);
3949 rtw_coex_get_bt_reg(rtwdev, 3, 0xac, &coex_stat->bt_reg_vendor_ac);
3951 if (coex_stat->patch_ver != 0)
3952 coex_stat->bt_mailbox_reply = true;
3980 coex_stat->bt_supported_version,
3981 coex_stat->bt_disabled ? "(BT disabled)" :
3982 coex_stat->bt_supported_version >= chip->bt_desired_ver ?
3986 coex_stat->bt_slave ? "Slave" : "Master",
3987 coex_stat->cnt_bt[COEX_CNT_BT_ROLESWITCH],
3992 coex_stat->patch_ver,
3993 chip->wl_fw_desired_ver, coex_stat->kt_ver + 65);
4007 coex_stat->bt_rssi - 100,
4008 coex_stat->cnt_bt[COEX_CNT_BT_RETRY],
4009 coex_stat->cnt_bt[COEX_CNT_BT_POPEVENT]);
4012 coex_stat->bt_a2dp_exist ? (coex_stat->bt_a2dp_sink ?
4014 coex_stat->bt_hfp_exist ? "HFP," : "",
4015 coex_stat->bt_hid_exist ?
4016 (coex_stat->bt_ble_exist ? "HID(RCU)," :
4017 coex_stat->bt_hid_slot >= 2 ? "HID(4/18)" :
4018 coex_stat->bt_ble_hid_exist ? "HID(BLE)" :
4020 coex_stat->bt_pan_exist ? coex_stat->bt_opp_exist ?
4022 coex_stat->bt_ble_voice ? "Voice," : "",
4023 coex_stat->bt_multi_link);
4026 coex_stat->cnt_bt[COEX_CNT_BT_REINIT],
4027 coex_stat->cnt_bt[COEX_CNT_BT_SETUPLINK],
4028 coex_stat->cnt_bt[COEX_CNT_BT_IGNWLANACT],
4029 coex_stat->bt_supported_feature);
4032 coex_stat->cnt_bt[COEX_CNT_BT_PAGE],
4033 coex_stat->cnt_bt[COEX_CNT_BT_INQ],
4034 coex_stat->cnt_bt[COEX_CNT_BT_IQK],
4035 coex_stat->cnt_bt[COEX_CNT_BT_IQKFAIL]);
4038 coex_stat->bt_reg_vendor_ae,
4039 coex_stat->bt_reg_vendor_ac,
4043 coex_stat->hi_pri_tx, coex_stat->hi_pri_rx,
4044 coex_stat->lo_pri_tx, coex_stat->lo_pri_rx);
4048 coex_stat->bt_info_c2h[i]);
4057 coex_stat->wl_gl_busy,
4088 rtw_coex_get_wl_coex_mode(coex_stat->wl_coex_mode),
4090 coex_stat->tdma_timer_base);
4099 coex_stat->cnt_wl[COEX_CNT_WL_COEXRUN],
4106 coex_stat->wl_force_lps_ctrl ? "On" : "Off",
4107 coex_stat->wl_gl_busy);
4110 coex_stat->wl_fw_dbg_info[1], coex_stat->wl_fw_dbg_info[2],
4111 coex_stat->wl_fw_dbg_info[3], coex_stat->wl_fw_dbg_info[4],
4112 coex_stat->wl_fw_dbg_info[5]);
4115 coex_stat->wl_fw_dbg_info[6],
4116 coex_stat->wl_fw_dbg_info[7],
4117 coex_stat->wl_slot_extend ? "Yes" : "No",
4118 coex_stat->cnt_wl[COEX_CNT_WL_FW_NOTIFY]);
4153 coex_stat->wl_hi_pri_task1 ? "Y" : "N",
4154 coex_stat->wl_cck_lock ? "Y" : "N",
4155 coex_stat->wl_cck_lock_ever ? "Y" : "N",
4156 coex_stat->wl_noisy_level);