realtek/rtl8xxxu/rtl8xxxu_8188f.c

754 	u8 val8;
765 	val8 = RF_ENABLE | RF_RSTB | RF_SDMRSTB;
766 	rtl8xxxu_write8(priv, REG_RF_CTRL, val8);
772 	val8 = SYS_FUNC_BB_GLB_RSTN | SYS_FUNC_BBRSTB | SYS_FUNC_USBA | SYS_FUNC_USBD;
773 	rtl8xxxu_write8(priv, REG_SYS_FUNC, val8);
1321 	u16 val8;
1324 	val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
1325 	val8 &= ~((APS_FSMCO_PCIE | APS_FSMCO_HW_SUSPEND) >> 8);
1326 	rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
1329 	val8 = rtl8xxxu_read8(priv, 0xc4);
1330 	val8 &= ~BIT(4);
1331 	rtl8xxxu_write8(priv, 0xc4, val8);
1336 	u8 val8;
1341 	val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
1342 	val8 &= ~(APS_FSMCO_SW_LPS >> 8);
1343 	rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
1360 	val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
1361 	val8 &= ~(APS_FSMCO_HW_POWERDOWN >> 8);
1362 	rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
1365 	val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
1366 	val8 &= ~(APS_FSMCO_HW_SUSPEND >> 8);
1367 	rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
1370 	val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
1371 	val8 |= APS_FSMCO_MAC_ENABLE >> 8;
1372 	rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
1389 	val8 = rtl8xxxu_write8(priv, 0x27, 0x35);
1396 	u8 val8;
1404 	val8 = rtl8xxxu_read8(priv, 0x4e);
1405 	val8 &= ~BIT(7);
1406 	rtl8xxxu_write8(priv, 0x4e, val8);
1412 	val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
1413 	val8 |= APS_FSMCO_MAC_OFF >> 8;
1414 	rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
1436 	u8 val8;
1439 	val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
1440 	val8 &= ~((APS_FSMCO_PCIE | APS_FSMCO_HW_SUSPEND) >> 8);
1441 	val8 |= APS_FSMCO_HW_SUSPEND >> 8;
1442 	rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
1445 	val8 = rtl8xxxu_read8(priv, 0xc4);
1446 	val8 |= BIT(4);
1447 	rtl8xxxu_write8(priv, 0xc4, val8);
1455 	u8 val8;
1461 	val8 = rtl8xxxu_read8(priv, REG_FTIMR + 1);
1462 	val8 |= IMR0_CPWM >> 8;
1463 	rtl8xxxu_write8(priv, REG_FTIMR + 1, val8);
1489 	val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC);
1490 	val8 &= ~SYS_FUNC_BBRSTB;
1491 	rtl8xxxu_write8(priv, REG_SYS_FUNC, val8);
1496 	val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC);
1497 	val8 &= ~SYS_FUNC_BB_GLB_RSTN;
1498 	rtl8xxxu_write8(priv, REG_SYS_FUNC, val8);
1507 	val8 = rtl8xxxu_read8(priv, REG_DUAL_TSF_RST);
1508 	val8 |= DUAL_TSF_TX_OK;
1509 	rtl8xxxu_write8(priv, REG_DUAL_TSF_RST, val8);
1542 	u8 val8;
1555 	val8 = rtl8xxxu_read8(priv, REG_TX_REPORT_CTRL);
1556 	val8 &= ~TX_REPORT_CTRL_TIMER_ENABLE;
1557 	rtl8xxxu_write8(priv, REG_TX_REPORT_CTRL, val8);
1586 	u8 pg_pwrtrim = 0xff, val8;
1602 		val8 = abs(bb_gain);
1604 			val8 |= BIT(5);
1608 		val32 |= val8 << 14;