Lines Matching refs:rtl8xxxu_read32

297 	sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG);
311 val32 = rtl8xxxu_read32(priv, REG_MULTI_FUNC_CTRL);
323 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS);
399 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32);
404 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11);
541 val32 = rtl8xxxu_read32(priv, REG_PAD_CTRL1);
545 val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);
549 val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);
553 val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);
557 val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);
561 val32 = rtl8xxxu_read32(priv, REG_RFE_BUFFER);
565 val32 = rtl8xxxu_read32(priv, REG_RFE_CTRL_ANTA_SRC);
570 val32 = rtl8xxxu_read32(priv, REG_PWR_DATA);
580 path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);
585 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
622 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
658 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
663 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);
664 reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);
665 reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);
690 path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);
695 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
732 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
768 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
773 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);
774 reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);
775 reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);
798 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
836 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
867 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
872 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);
873 reg_ea4 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2);
921 u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff;
922 u8 xb_agc = rtl8xxxu_read32(priv, REG_OFDM0_XB_AGC_CORE1) & 0xff;
943 val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);
955 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
976 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
980 val32 = rtl8xxxu_read32(priv,
983 val32 = rtl8xxxu_read32(priv,
997 val32 = rtl8xxxu_read32(priv,
1000 val32 = rtl8xxxu_read32(priv,
1019 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
1024 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
1035 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_B);
1037 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_B);
1049 val32 = rtl8xxxu_read32(priv,
1052 val32 = rtl8xxxu_read32(priv,
1065 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
1082 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
1088 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_AGC_CORE1);
1122 bt_control = rtl8xxxu_read32(priv, REG_BT_CONTROL_8723BU);
1242 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
1314 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
1329 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
1334 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
1339 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
1344 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
1349 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
1450 val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);
1509 val32 = rtl8xxxu_read32(priv, REG_RX_WAIT_CCA);
1553 val32 = rtl8xxxu_read32(priv, REG_PWR_DATA);
1562 val32 = rtl8xxxu_read32(priv, REG_RFE_BUFFER);
1568 val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);
1628 agg_rx = rtl8xxxu_read32(priv, REG_RXDMA_AGG_PG_TH);
1646 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
1650 val32 = rtl8xxxu_read32(priv, REG_NHM_TH9_TH10_8723B);
1654 val32 = rtl8xxxu_read32(priv, REG_OFDM0_FA_RSTC);