rtl818x/rtl8187/dev.c

180 	rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
181 	rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
182 	rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
183 	rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
595 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
597 	reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
599 	rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
600 	rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
601 	rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2);
603 		rtl818x_iowrite8(priv, &priv->map->ANAPARAM3A, anaparam3);
605 	rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
606 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
616 	reg = rtl818x_ioread8(priv, &priv->map->CMD);
619 	rtl818x_iowrite8(priv, &priv->map->CMD, reg);
624 		if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
635 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
640 		if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
662 	rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
677 	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
678 	rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
680 	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
681 	rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
682 	rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
684 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
687 	reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
690 	rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
692 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
694 	rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
695 	rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
696 	rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
699 	rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
700 	rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
703 	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
704 	rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
707 	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
708 	rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
709 	rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
710 	rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
711 	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
712 	rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
715 	rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
716 	rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
717 	rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
718 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
720 	rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
721 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
723 	rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
728 	rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
729 	reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
730 	rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
732 	rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
734 	rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
795 	reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
797 	rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
805 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
807 	reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
808 	rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
809 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
812 	rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
821 	rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
822 	rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
828 	rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
833 	rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
834 	rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
835 	rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
841 	rtl818x_iowrite8(priv, &priv->map->CMD, reg);
842 	rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
866 	rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
875 	rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
878 	rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
950 		rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
952 		reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
956 		rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
958 		rtl818x_iowrite32(priv, &priv->map->TX_CONF,
973 	rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
975 	rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
976 	rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
993 	rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
995 	reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
998 	rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
1000 	reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
1004 	rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
1009 	rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1011 	reg = rtl818x_ioread8(priv, &priv->map->CMD);
1014 	rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1029 	rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1031 	reg = rtl818x_ioread8(priv, &priv->map->CMD);
1034 	rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1039 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1040 	reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1041 	rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1042 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1058 	return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1059 	       (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1134 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1136 		rtl818x_iowrite8(priv, &priv->map->MAC[i],
1138 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1161 	reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1166 	rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1170 	rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1172 	rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1173 	rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1174 	rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1175 	rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1210 		rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1211 		rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1212 		rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1218 		rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1230 		rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1238 		rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1240 			rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1241 			rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1242 			rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1244 			rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1245 			rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1246 			rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1266 			rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1283 		rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1337 	rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1372 		rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1403 	u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1426 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1475 	priv->map = (struct rtl818x_csr *)0xFF00;
1495 	if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1500 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1529 	reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1530 	rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1535 	rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1536 	rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1540 		reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);