Lines Matching defs:word

53 			      const unsigned int word, const u8 value)
66 rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
77 const unsigned int word)
94 rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
111 const unsigned int word, const u32 value)
135 rt2x00_rf_write(rt2x00dev, word, value);
654 u8 word;
708 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
1449 u32 word;
1454 word = rt2x00_desc_read(txd, 0);
1455 rt2x00_set_field32(&word, TXD_W0_BURST,
1457 rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1458 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1460 rt2x00_set_field32(&word, TXD_W0_ACK,
1462 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1464 rt2x00_set_field32(&word, TXD_W0_OFDM,
1466 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs);
1467 rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1469 rt2x00_set_field32(&word, TXD_W0_TKIP_MIC,
1471 rt2x00_set_field32(&word, TXD_W0_KEY_TABLE,
1473 rt2x00_set_field32(&word, TXD_W0_KEY_INDEX, txdesc->key_idx);
1474 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1475 rt2x00_set_field32(&word, TXD_W0_BURST2,
1477 rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, txdesc->cipher);
1478 rt2x00_desc_write(txd, 0, word);
1480 word = rt2x00_desc_read(txd, 1);
1481 rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, entry->queue->qid);
1482 rt2x00_set_field32(&word, TXD_W1_AIFSN, entry->queue->aifs);
1483 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
1484 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
1485 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1486 rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE,
1488 rt2x00_desc_write(txd, 1, word);
1490 word = rt2x00_desc_read(txd, 2);
1491 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
1492 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
1493 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
1495 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH,
1497 rt2x00_desc_write(txd, 2, word);
1504 word = rt2x00_desc_read(txd, 5);
1505 rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1507 rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1508 rt2x00_desc_write(txd, 5, word);
1751 u16 word;
1763 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA);
1764 if (word == 0xffff) {
1765 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1766 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1768 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1770 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1771 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1772 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1773 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1774 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1775 rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
1778 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC);
1779 if (word == 0xffff) {
1780 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1781 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1782 rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word);
1785 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_LED);
1786 if (word == 0xffff) {
1787 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1788 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1789 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1790 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1791 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1792 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1793 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1794 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1795 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1797 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1798 rt2x00_eeprom_dbg(rt2x00dev, "Led: 0x%04x\n", word);
1801 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ);
1802 if (word == 0xffff) {
1803 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1804 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1805 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1806 rt2x00_eeprom_dbg(rt2x00dev, "Freq: 0x%04x\n", word);
1809 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG);
1810 if (word == 0xffff) {
1811 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1812 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1813 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1814 rt2x00_eeprom_dbg(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1816 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1818 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1819 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1821 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1822 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1825 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A);
1826 if (word == 0xffff) {
1827 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1828 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1829 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1830 rt2x00_eeprom_dbg(rt2x00dev, "RSSI OFFSET A: 0x%04x\n", word);
1832 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1834 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1835 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1837 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1838 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1851 * Read EEPROM word for configuration.