ralink/rt2x00/rt2800lib.c

4166 	u32 tx_pin;
4356 		tx_pin = rt2800_register_read(rt2x00dev, TX_PIN_CFG);
4357 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFRX_EN, 1);
4359 		tx_pin = 0;
4365 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A2_EN,
4367 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G2_EN,
4372 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN,
4374 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN,
4379 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN,
4382 			rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, 1);
4384 			rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN,
4392 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A2_EN, 1);
4393 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G2_EN, 1);
4397 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1);
4398 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1);
4402 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1);
4403 		rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1);
4407 	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1);
4408 	rt2x00_set_field32(&tx_pin, TX_PIN_CFG_TRSW_EN, 1);
4410 	rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
5542 	u32	tx_pin;
5554 	tx_pin = rt2800_register_read(rt2x00dev, TX_PIN_CFG);
5555 	tx_pin &= TX_PIN_CFG_PA_PE_DISABLE;
5556 	rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
5603 	tx_pin = rt2800_register_read(rt2x00dev, TX_PIN_CFG);
5607 			rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G2_EN, 1);
5610 			rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1);
5614 			rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, 1);
5620 			rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A2_EN, 1);
5623 			rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 1);
5627 			rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, 1);
5631 	rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);