microchip/wilc1000/wlan.c

561 	const struct wilc_hif_func *hif_func = wilc->hif_func;
585 		ret = hif_func->hif_read_reg(wilc, to_host_from_fw_reg, &reg);
595 	ret = hif_func->hif_read_reg(wilc, wakeup_reg, &reg);
600 		ret = hif_func->hif_write_reg(wilc, wakeup_reg, reg);
605 	ret = hif_func->hif_read_reg(wilc, from_host_to_fw_reg, &reg);
610 		ret = hif_func->hif_write_reg(wilc, from_host_to_fw_reg, reg);
625 	const struct wilc_hif_func *hif_func = wilc->hif_func;
644 	ret = hif_func->hif_write_reg(wilc, from_host_to_fw_reg,
650 	ret = hif_func->hif_write_reg(wilc, wakeup_reg,
656 		ret = hif_func->hif_read_reg(wilc, clk_status_reg,
675 		wilc->hif_func->hif_reset(wilc);
682 	wilc->hif_func->hif_write_reg(wilc, WILC_CORTUS_INTERRUPT_2, 1);
690 	wilc->hif_func->hif_write_reg(wilc, WILC_CORTUS_INTERRUPT_1, 1);
789 	func = wilc->hif_func;
1014 	wilc->hif_func->hif_clear_int_ext(wilc, 0);
1029 		wilc->hif_func->hif_read_size(wilc, &size);
1042 	wilc->hif_func->hif_clear_int_ext(wilc, DATA_INT_CLR | ENABLE_RX_VMM);
1043 	ret = wilc->hif_func->hif_block_rx_ext(wilc, 0, buffer, size);
1064 	wilc->hif_func->hif_read_int(wilc, &int_status);
1096 	wilc->hif_func->hif_read_reg(wilc, WILC_GLB_RESET_0, &reg);
1098 	ret = wilc->hif_func->hif_write_reg(wilc, WILC_GLB_RESET_0, reg);
1099 	wilc->hif_func->hif_read_reg(wilc, WILC_GLB_RESET_0, &reg);
1116 			ret = wilc->hif_func->hif_block_tx(wilc, addr,
1154 	ret = wilc->hif_func->hif_write_reg(wilc, WILC_VMM_CORE_CFG, reg);
1162 	ret = wilc->hif_func->hif_write_reg(wilc, WILC_GP_REG_1, reg);
1166 	wilc->hif_func->hif_sync_ext(wilc, NUM_INT_EXT);
1168 	ret = wilc->hif_func->hif_read_reg(wilc, WILC_CHIPID, &chipid);
1172 	wilc->hif_func->hif_read_reg(wilc, WILC_GLB_RESET_0, &reg);
1175 		wilc->hif_func->hif_write_reg(wilc, WILC_GLB_RESET_0, reg);
1176 		wilc->hif_func->hif_read_reg(wilc, WILC_GLB_RESET_0, &reg);
1180 	ret = wilc->hif_func->hif_write_reg(wilc, WILC_GLB_RESET_0, reg);
1181 	wilc->hif_func->hif_read_reg(wilc, WILC_GLB_RESET_0, &reg);
1195 	ret = wilc->hif_func->hif_read_reg(wilc, GLOBAL_MODE_CONTROL, &reg);
1200 	ret = wilc->hif_func->hif_write_reg(wilc, GLOBAL_MODE_CONTROL, reg);
1204 	ret = wilc->hif_func->hif_read_reg(wilc, PWR_SEQ_MISC_CTRL, &reg);
1209 	ret = wilc->hif_func->hif_write_reg(wilc, PWR_SEQ_MISC_CTRL, reg);
1213 	ret = wilc->hif_func->hif_read_reg(wilc, WILC_GP_REG_0, &reg);
1219 	ret = wilc->hif_func->hif_write_reg(wilc, WILC_GP_REG_0,
1260 	wilc->hif_func->hif_deinit(wilc);
1417 		ret = wilc->hif_func->hif_read_reg(wilc,
1425 		ret = wilc->hif_func->hif_write_reg(wilc,
1432 		ret = wilc->hif_func->hif_write_reg(wilc,
1453 		wilc->hif_func->hif_read_reg(wilc, WILC_CHIPID, &chipid);
1454 		wilc->hif_func->hif_read_reg(wilc, WILC_RF_REVISION_ID,
1485 	if (!wilc->hif_func->hif_is_init(wilc)) {
1487 		ret = wilc->hif_func->hif_init(wilc, false);