iwlwifi/pcie/trans-gen2.c

6 #include "iwl-trans.h"
20 int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
24 	IWL_DEBUG_INFO(trans, "Init card's basic functions\n");
35 	iwl_set_bit(trans, CSR_GIO_CHICKEN_BITS,
39 	iwl_set_bit(trans, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
45 	iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
48 	iwl_pcie_apm_config(trans);
50 	ret = iwl_finish_nic_init(trans);
54 	set_bit(STATUS_DEVICE_ENABLED, &trans->status);
59 static void iwl_pcie_gen2_apm_stop(struct iwl_trans *trans, bool op_mode_leave)
61 	IWL_DEBUG_INFO(trans, "Stop card, put in low power state\n");
64 		if (!test_bit(STATUS_DEVICE_ENABLED, &trans->status))
65 			iwl_pcie_gen2_apm_init(trans);
68 		iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
70 		iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
74 		iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
79 	clear_bit(STATUS_DEVICE_ENABLED, &trans->status);
82 	iwl_pcie_apm_stop_master(trans);
84 	iwl_trans_sw_reset(trans, false);
90 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
91 		iwl_clear_bit(trans, CSR_GP_CNTRL,
94 		iwl_clear_bit(trans, CSR_GP_CNTRL,
98 static void iwl_trans_pcie_fw_reset_handshake(struct iwl_trans *trans)
100 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
105 	if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
106 		iwl_write_umac_prph(trans, UREG_NIC_SET_NMI_DRIVER,
108 	else if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210)
109 		iwl_write_umac_prph(trans, UREG_DOORBELL_TO_ISR6,
112 		iwl_write32(trans, CSR_DOORBELL_VECTOR,
120 		u32 inta_hw = iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD);
122 		IWL_ERR(trans,
127 			iwl_trans_fw_error(trans, true);
133 void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)
135 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
142 	if (trans->state >= IWL_TRANS_FW_STARTED)
144 			iwl_trans_pcie_fw_reset_handshake(trans);
149 	iwl_disable_interrupts(trans);
152 	iwl_pcie_disable_ict(trans);
161 	if (test_and_clear_bit(STATUS_DEVICE_ENABLED, &trans->status)) {
162 		IWL_DEBUG_INFO(trans,
164 		iwl_pcie_synchronize_irqs(trans);
165 		iwl_pcie_rx_napi_sync(trans);
166 		iwl_txq_gen2_tx_free(trans);
167 		iwl_pcie_rx_stop(trans);
170 	iwl_pcie_ctxt_info_free_paging(trans);
171 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
172 		iwl_pcie_ctxt_info_gen3_free(trans, false);
174 		iwl_pcie_ctxt_info_free(trans);
177 	iwl_pcie_gen2_apm_stop(trans, false);
180 	iwl_trans_sw_reset(trans, true);
198 	iwl_disable_interrupts(trans);
201 	clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status);
202 	clear_bit(STATUS_INT_ENABLED, &trans->status);
203 	clear_bit(STATUS_TPOWER_PMI, &trans->status);
209 	iwl_enable_rfkill_int(trans);
212 void iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)
214 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
217 	iwl_op_mode_time_point(trans->op_mode,
223 	was_in_rfkill = test_bit(STATUS_RFKILL_OPMODE, &trans->status);
224 	_iwl_trans_pcie_gen2_stop_device(trans);
225 	iwl_trans_pcie_handle_stop_rfkill(trans, was_in_rfkill);
229 static int iwl_pcie_gen2_nic_init(struct iwl_trans *trans)
231 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
233 			       trans->cfg->min_txq_size);
238 	ret = iwl_pcie_gen2_apm_init(trans);
243 	iwl_op_mode_nic_config(trans->op_mode);
246 	if (iwl_pcie_gen2_rx_init(trans))
250 	if (iwl_txq_gen2_init(trans, trans->txqs.cmd.q_id, queue_size))
254 	iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL, 0x800FFFFF);
255 	IWL_DEBUG_INFO(trans, "Enabling shadow registers in device\n");
260 static void iwl_pcie_get_rf_name(struct iwl_trans *trans)
262 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
271 	switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) {
298 		    CSR_HW_RFID_STEP(trans->hw_rf_id))
307 	switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) {
311 		version = iwl_read_prph(trans, CNVI_MBOX_C);
330 			 trans->hw_rf_id);
332 	IWL_INFO(trans, "Detected RF %s\n", buf);
342 void iwl_trans_pcie_gen2_fw_alive(struct iwl_trans *trans, u32 scd_addr)
344 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
346 	iwl_pcie_reset_ict(trans);
349 	memset(trans->txqs.queue_stopped, 0,
350 	       sizeof(trans->txqs.queue_stopped));
351 	memset(trans->txqs.queue_used, 0, sizeof(trans->txqs.queue_used));
356 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
357 		iwl_pcie_ctxt_info_gen3_free(trans, true);
359 		iwl_pcie_ctxt_info_free(trans);
365 	iwl_enable_interrupts(trans);
367 	iwl_pcie_check_hw_rf_kill(trans);
369 	iwl_pcie_get_rf_name(trans);
373 static bool iwl_pcie_set_ltr(struct iwl_trans *trans)
390 	if ((trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210 ||
391 	     trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000) &&
392 	    !trans->trans_cfg->integrated) {
393 		iwl_write32(trans, CSR_LTR_LONG_VAL_AD, ltr_val);
397 	if (trans->trans_cfg->integrated &&
398 	    trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000) {
399 		iwl_write_prph(trans, HPM_MAC_LTR_CSR, HPM_MAC_LRT_ENABLE_ALL);
400 		iwl_write_prph(trans, HPM_UMAC_LTR, ltr_val);
404 	if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
406 		iwl_write32(trans, CSR_MSIX_HW_INT_CAUSES_AD,
422 static void iwl_pcie_spin_for_iml(struct iwl_trans *trans)
426 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
434 	value = iwl_read32(trans, CSR_LTR_LAST_MSG);
435 	IWL_DEBUG_INFO(trans, "Polling for IML load - CSR_LTR_LAST_MSG=0x%x\n",
439 		if (iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD) &
445 		value = iwl_read32(trans, CSR_LTR_LAST_MSG);
449 	IWL_DEBUG_INFO(trans,
460 int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans,
463 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
468 	if (iwl_pcie_prepare_card_hw(trans)) {
469 		IWL_WARN(trans, "Exit HW not ready\n");
473 	iwl_enable_rfkill_int(trans);
475 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
482 	iwl_disable_interrupts(trans);
485 	iwl_pcie_synchronize_irqs(trans);
490 	hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);
498 		IWL_WARN(trans,
505 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
506 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,
510 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
512 	ret = iwl_pcie_gen2_nic_init(trans);
514 		IWL_ERR(trans, "Unable to init nic\n");
518 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
519 		ret = iwl_pcie_ctxt_info_gen3_init(trans, fw);
521 		ret = iwl_pcie_ctxt_info_init(trans, fw);
525 	keep_ram_busy = !iwl_pcie_set_ltr(trans);
527 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
528 		iwl_write32(trans, CSR_FUNC_SCRATCH, CSR_FUNC_SCRATCH_INIT_VALUE);
529 		iwl_set_bit(trans, CSR_GP_CNTRL,
531 	} else if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
532 		iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1);
534 		iwl_write_prph(trans, UREG_CPU_INIT_RUN, 1);
538 		iwl_pcie_spin_for_iml(trans);
541 	hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);