intel/iwlwifi/iwl-eeprom-read.c

36 static int iwl_eeprom_acquire_semaphore(struct iwl_trans *trans)
43 		iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
47 		ret = iwl_poll_bit(trans, CSR_HW_IF_CONFIG_REG,
52 			IWL_DEBUG_EEPROM(trans->dev,
62 static void iwl_eeprom_release_semaphore(struct iwl_trans *trans)
64 	iwl_clear_bit(trans, CSR_HW_IF_CONFIG_REG,
68 static int iwl_eeprom_verify_signature(struct iwl_trans *trans, bool nvm_is_otp)
70 	u32 gp = iwl_read32(trans, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
72 	IWL_DEBUG_EEPROM(trans->dev, "EEPROM signature=0x%08x\n", gp);
77 			IWL_ERR(trans, "EEPROM with bad signature: 0x%08x\n",
85 			IWL_ERR(trans, "OTP with bad signature: 0x%08x\n", gp);
91 		IWL_ERR(trans,
104 static void iwl_set_otp_access_absolute(struct iwl_trans *trans)
106 	iwl_read32(trans, CSR_OTP_GP_REG);
108 	iwl_clear_bit(trans, CSR_OTP_GP_REG,
112 static int iwl_nvm_is_otp(struct iwl_trans *trans)
117 	switch (trans->hw_rev & CSR_HW_REV_TYPE_MSK) {
119 		IWL_ERR(trans, "Unknown hardware type\n");
127 		otpgp = iwl_read32(trans, CSR_OTP_GP_REG);
134 static int iwl_init_otp_access(struct iwl_trans *trans)
138 	ret = iwl_finish_nic_init(trans);
142 	iwl_set_bits_prph(trans, APMG_PS_CTRL_REG,
145 	iwl_clear_bits_prph(trans, APMG_PS_CTRL_REG,
152 	if (trans->trans_cfg->base_params->shadow_ram_support)
153 		iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
159 static int iwl_read_otp_word(struct iwl_trans *trans, u16 addr,
166 	iwl_write32(trans, CSR_EEPROM_REG,
168 	ret = iwl_poll_bit(trans, CSR_EEPROM_REG,
173 		IWL_ERR(trans, "Time out reading OTP[%d]\n", addr);
176 	r = iwl_read32(trans, CSR_EEPROM_REG);
178 	otpgp = iwl_read32(trans, CSR_OTP_GP_REG);
182 		iwl_set_bit(trans, CSR_OTP_GP_REG,
184 		IWL_ERR(trans, "Uncorrectable OTP ECC error, abort OTP read\n");
190 		iwl_set_bit(trans, CSR_OTP_GP_REG,
192 		IWL_ERR(trans, "Correctable OTP ECC error, continue read\n");
201 static bool iwl_is_otp_empty(struct iwl_trans *trans)
208 	if (!iwl_read_otp_word(trans, next_link_addr, &link_value)) {
210 			IWL_ERR(trans, "OTP is empty\n");
214 		IWL_ERR(trans, "Unable to read first block of OTP list.\n");
231 static int iwl_find_otp_image(struct iwl_trans *trans,
239 	iwl_set_otp_access_absolute(trans);
242 	if (iwl_is_otp_empty(trans))
256 		IWL_DEBUG_EEPROM(trans->dev, "OTP blocks %d addr 0x%x\n",
258 		if (iwl_read_otp_word(trans, next_link_addr, &link_value))
273 	} while (usedblocks <= trans->trans_cfg->base_params->max_ll_items);
276 	IWL_DEBUG_EEPROM(trans->dev, "OTP has no valid blocks\n");
288 int iwl_read_eeprom(struct iwl_trans *trans, u8 **eeprom, size_t *eeprom_size)
291 	u32 gp = iwl_read32(trans, CSR_EEPROM_GP);
302 	nvm_is_otp = iwl_nvm_is_otp(trans);
306 	sz = trans->trans_cfg->base_params->eeprom_size;
307 	IWL_DEBUG_EEPROM(trans->dev, "NVM size = %d\n", sz);
313 	ret = iwl_eeprom_verify_signature(trans, nvm_is_otp);
315 		IWL_ERR(trans, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
320 	ret = iwl_eeprom_acquire_semaphore(trans);
322 		IWL_ERR(trans, "Failed to acquire EEPROM semaphore.\n");
327 		ret = iwl_init_otp_access(trans);
329 			IWL_ERR(trans, "Failed to initialize OTP access.\n");
333 		iwl_write32(trans, CSR_EEPROM_GP,
334 			    iwl_read32(trans, CSR_EEPROM_GP) &
337 		iwl_set_bit(trans, CSR_OTP_GP_REG,
341 		if (!trans->trans_cfg->base_params->shadow_ram_support) {
342 			ret = iwl_find_otp_image(trans, &validblockaddr);
350 			ret = iwl_read_otp_word(trans, addr, &eeprom_data);
361 			iwl_write32(trans, CSR_EEPROM_REG,
364 			ret = iwl_poll_bit(trans, CSR_EEPROM_REG,
369 				IWL_ERR(trans,
373 			r = iwl_read32(trans, CSR_EEPROM_REG);
378 	IWL_DEBUG_EEPROM(trans->dev, "NVM Type: %s\n",
381 	iwl_eeprom_release_semaphore(trans);
388 	iwl_eeprom_release_semaphore(trans);