Lines Matching refs:dbg

10 #include "dbg.h"
779 const struct iwl_fw_dbg_mem_seg_tlv *fw_mem = fwrt->fw->dbg.mem_tlv;
782 u32 smem_len = fwrt->fw->dbg.n_mem_tlv ? 0 : fwrt->trans->cfg->smem_len;
783 u32 sram2_len = fwrt->fw->dbg.n_mem_tlv ?
829 if (!fwrt->fw->dbg.n_mem_tlv)
836 for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++)
954 fwrt->fw->dbg.mem_tlv;
956 if (!fwrt->fw->dbg.n_mem_tlv)
960 for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++) {
1267 frag = &fwrt->trans->dbg.fw_mon_ini[alloc_id].frags[idx];
1689 u64 imr_curr_addr = fwrt->trans->dbg.imr_data.imr_curr_addr;
1690 u32 imr_rem_bytes = fwrt->trans->dbg.imr_data.imr2sram_remainbyte;
1691 u32 sram_addr = fwrt->trans->dbg.imr_data.sram_addr;
1692 u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
1702 fwrt->trans->dbg.imr_data.imr_curr_addr = imr_curr_addr + size_to_dump;
1703 fwrt->trans->dbg.imr_data.imr2sram_remainbyte -= size_to_dump;
1905 fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
1940 u32 imr_enable = fwrt->trans->dbg.imr_data.imr_enable;
1941 u32 imr_size = fwrt->trans->dbg.imr_data.imr_size;
1942 u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
2016 fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
2156 u32 imr_enable = fwrt->trans->dbg.imr_data.imr_enable;
2157 u32 imr_size = fwrt->trans->dbg.imr_data.imr_size;
2158 u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
2354 list_for_each_entry(node, &fwrt->trans->dbg.debug_info_tlv_list, list) {
2375 cpu_to_le32(fwrt->trans->dbg.external_ini_cfg);
2413 dump->fw_mon_mode = cpu_to_le32(fwrt->trans->dbg.ini_dest);
2415 ~cpu_to_le64(fwrt->trans->dbg.unsupported_region_msk);
2423 list_for_each_entry(node, &fwrt->trans->dbg.debug_info_tlv_list, list) {
2451 u32 len = strnlen(fwrt->trans->dbg.dump_file_name_ext,
2454 if (!fwrt->trans->dbg.dump_file_name_ext_valid)
2466 memcpy(tlv->data, fwrt->trans->dbg.dump_file_name_ext, len);
2471 fwrt->trans->dbg.dump_file_name_ext_valid = false;
2610 ~(fwrt->trans->dbg.unsupported_region_msk);
2614 ARRAY_SIZE(fwrt->trans->dbg.active_regions));
2616 for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.active_regions); i++) {
2623 reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
2653 imr_reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
2747 u32 dump_mask = fwrt->fw->dbg.dump_mask;
3008 if (WARN_ONCE(conf_id >= ARRAY_SIZE(fwrt->fw->dbg.conf_tlv),
3013 if ((!fwrt->fw->dbg.conf_tlv[conf_id] ||
3014 !fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds) &&
3018 if (!fwrt->fw->dbg.conf_tlv[conf_id])
3026 ptr = (void *)&fwrt->fw->dbg.conf_tlv[conf_id]->hcmd;
3027 for (i = 0; i < fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds; i++) {
3120 if (fwrt->trans->dbg.last_tp_resetfw == IWL_FW_INI_RESET_FW_MODE_STOP_FW_ONLY)
3371 fwrt->trans->dbg.rec_on = false;
3390 u32 preset = u32_get_bits(fwrt->trans->dbg.domains_bitmap,
3397 if (fwrt->trans->dbg.yoyo_bin_loaded || (preset && preset != 1))