Lines Matching refs:agg

382 		    tid_data->agg.state != IWL_AGG_ON) {
384 "TX_CTL_AMPDU while not in AGG: Tx flags = 0x%08x, agg.state = %d\n",
385 info->flags, tid_data->agg.state);
395 if (WARN_ONCE(tid_data->agg.state != IWL_AGG_ON &&
396 tid_data->agg.state != IWL_AGG_OFF,
397 "Tx while agg.state = %d\n", tid_data->agg.state))
417 txq_id = priv->tid_data[sta_id][tid].agg.txq_id;
499 txq_id = tid_data->agg.txq_id;
501 switch (tid_data->agg.state) {
523 sta_id, tid, tid_data->agg.state);
528 tid_data->agg.ssn = IEEE80211_SEQ_TO_SN(tid_data->seq_number);
535 } else if (tid_data->agg.ssn != tid_data->next_reclaimed) {
538 tid_data->agg.ssn,
540 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_DELBA;
546 tid_data->agg.ssn);
548 agg_state = tid_data->agg.state;
549 tid_data->agg.state = IWL_AGG_OFF;
563 IWL_DEBUG_TX_QUEUES(priv, "Don't disable tx agg: %d\n",
591 if (priv->tid_data[sta_id][tid].agg.state != IWL_AGG_OFF) {
610 tid_data->agg.ssn = IEEE80211_SEQ_TO_SN(tid_data->seq_number);
611 tid_data->agg.txq_id = txq_id;
613 *ssn = tid_data->agg.ssn;
617 tid_data->agg.ssn);
618 tid_data->agg.state = IWL_AGG_STARTING;
623 tid_data->agg.ssn,
625 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
641 * First set the agg state to OFF to avoid calling
647 txq_id = tid_data->agg.txq_id;
648 agg_state = tid_data->agg.state;
650 sta_id, tid, txq_id, tid_data->agg.state);
652 tid_data->agg.state = IWL_AGG_OFF;
669 IWL_DEBUG_TX_QUEUES(priv, "Don't disable tx agg: %d\n",
688 ssn = priv->tid_data[sta_priv->sta_id][tid].agg.ssn;
689 q = priv->tid_data[sta_priv->sta_id][tid].agg.txq_id;
690 priv->tid_data[sta_priv->sta_id][tid].agg.state = IWL_AGG_ON;
754 switch (priv->tid_data[sta_id][tid].agg.state) {
757 if (tid_data->agg.ssn == tid_data->next_reclaimed) {
762 tid_data->agg.txq_id, true);
763 iwlagn_dealloc_agg_txq(priv, tid_data->agg.txq_id);
764 tid_data->agg.state = IWL_AGG_OFF;
770 if (tid_data->agg.ssn == tid_data->next_reclaimed) {
774 tid_data->agg.state = IWL_AGG_STARTING;
926 struct iwl_ht_agg *agg = &priv->tid_data[sta_id][tid].agg;
932 if (agg->wait_for_ba)
936 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
937 agg->wait_for_ba = (tx_resp->frame_count > 1);
953 agg->txq_id,
1138 if (txq_id != priv->tid_data[sta_id][tid].agg.txq_id)
1140 priv->tid_data[sta_id][tid].agg.txq_id);
1266 struct iwl_ht_agg *agg;
1288 agg = &priv->tid_data[sta_id][tid].agg;
1292 if (unlikely(!agg->wait_for_ba)) {
1299 if (unlikely(scd_flow != agg->txq_id)) {
1308 scd_flow, sta_id, tid, agg->txq_id);
1323 agg->wait_for_ba,
1334 agg->wait_for_ba = false;
1379 iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags,