brcm80211/brcmutil/d11.c

41 static void brcmu_d11n_encchspec(struct brcmu_chan *ch)
43 	if (ch->bw == BRCMU_CHAN_BW_20)
44 		ch->sb = BRCMU_CHAN_SB_NONE;
46 	ch->chspec = 0;
47 	brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_CH_MASK,
48 			BRCMU_CHSPEC_CH_SHIFT, ch->chnum);
49 	brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11N_SB_MASK,
50 			0, d11n_sb(ch->sb));
51 	brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11N_BW_MASK,
52 			0, d11n_bw(ch->bw));
54 	if (ch->chnum <= CH_MAX_2G_CHANNEL)
55 		ch->chspec |= BRCMU_CHSPEC_D11N_BND_2G;
57 		ch->chspec |= BRCMU_CHSPEC_D11N_BND_5G;
77 static void brcmu_d11ac_encchspec(struct brcmu_chan *ch)
79 	if (ch->bw == BRCMU_CHAN_BW_20 || ch->sb == BRCMU_CHAN_SB_NONE)
80 		ch->sb = BRCMU_CHAN_SB_L;
82 	brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_CH_MASK,
83 			BRCMU_CHSPEC_CH_SHIFT, ch->chnum);
84 	brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11AC_SB_MASK,
85 			BRCMU_CHSPEC_D11AC_SB_SHIFT, ch->sb);
86 	brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11AC_BW_MASK,
87 			0, d11ac_bw(ch->bw));
89 	ch->chspec &= ~BRCMU_CHSPEC_D11AC_BND_MASK;
90 	if (ch->chnum <= CH_MAX_2G_CHANNEL)
91 		ch->chspec |= BRCMU_CHSPEC_D11AC_BND_2G;
93 		ch->chspec |= BRCMU_CHSPEC_D11AC_BND_5G;
96 static void brcmu_d11n_decchspec(struct brcmu_chan *ch)
100 	ch->chnum = (u8)(ch->chspec & BRCMU_CHSPEC_CH_MASK);
101 	ch->control_ch_num = ch->chnum;
103 	switch (ch->chspec & BRCMU_CHSPEC_D11N_BW_MASK) {
105 		ch->bw = BRCMU_CHAN_BW_20;
106 		ch->sb = BRCMU_CHAN_SB_NONE;
109 		ch->bw = BRCMU_CHAN_BW_40;
110 		val = ch->chspec & BRCMU_CHSPEC_D11N_SB_MASK;
112 			ch->sb = BRCMU_CHAN_SB_L;
113 			ch->control_ch_num -= CH_10MHZ_APART;
115 			ch->sb = BRCMU_CHAN_SB_U;
116 			ch->control_ch_num += CH_10MHZ_APART;
120 		WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
124 	switch (ch->chspec & BRCMU_CHSPEC_D11N_BND_MASK) {
126 		ch->band = BRCMU_CHAN_BAND_5G;
129 		ch->band = BRCMU_CHAN_BAND_2G;
132 		WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
137 static void brcmu_d11ac_decchspec(struct brcmu_chan *ch)
141 	ch->chnum = (u8)(ch->chspec & BRCMU_CHSPEC_CH_MASK);
142 	ch->control_ch_num = ch->chnum;
144 	switch (ch->chspec & BRCMU_CHSPEC_D11AC_BW_MASK) {
146 		ch->bw = BRCMU_CHAN_BW_20;
147 		ch->sb = BRCMU_CHAN_SB_NONE;
150 		ch->bw = BRCMU_CHAN_BW_40;
151 		val = ch->chspec & BRCMU_CHSPEC_D11AC_SB_MASK;
153 			ch->sb = BRCMU_CHAN_SB_L;
154 			ch->control_ch_num -= CH_10MHZ_APART;
156 			ch->sb = BRCMU_CHAN_SB_U;
157 			ch->control_ch_num += CH_10MHZ_APART;
159 			WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
163 		ch->bw = BRCMU_CHAN_BW_80;
164 		ch->sb = brcmu_maskget16(ch->chspec, BRCMU_CHSPEC_D11AC_SB_MASK,
166 		switch (ch->sb) {
168 			ch->control_ch_num -= CH_30MHZ_APART;
171 			ch->control_ch_num -= CH_10MHZ_APART;
174 			ch->control_ch_num += CH_10MHZ_APART;
177 			ch->control_ch_num += CH_30MHZ_APART;
180 			WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
185 		ch->bw = BRCMU_CHAN_BW_160;
186 		ch->sb = brcmu_maskget16(ch->chspec, BRCMU_CHSPEC_D11AC_SB_MASK,
188 		switch (ch->sb) {
190 			ch->control_ch_num -= CH_70MHZ_APART;
193 			ch->control_ch_num -= CH_50MHZ_APART;
196 			ch->control_ch_num -= CH_30MHZ_APART;
199 			ch->control_ch_num -= CH_10MHZ_APART;
202 			ch->control_ch_num += CH_10MHZ_APART;
205 			ch->control_ch_num += CH_30MHZ_APART;
208 			ch->control_ch_num += CH_50MHZ_APART;
211 			ch->control_ch_num += CH_70MHZ_APART;
214 			WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
220 		WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
224 	switch (ch->chspec & BRCMU_CHSPEC_D11AC_BND_MASK) {
226 		ch->band = BRCMU_CHAN_BAND_5G;
229 		ch->band = BRCMU_CHAN_BAND_2G;
232 		WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);