Lines Matching refs:txpwr

1312 				struct txpwr_limits *txpwr)
1318 &txpwr->cck[0], BRCMS_NUM_RATES_CCK);
1321 &txpwr->ofdm[0], BRCMS_NUM_RATES_OFDM);
1323 &txpwr->ofdm_cdd[0], BRCMS_NUM_RATES_OFDM);
1326 &txpwr->ofdm_40_siso[0], BRCMS_NUM_RATES_OFDM);
1328 &txpwr->ofdm_40_cdd[0], BRCMS_NUM_RATES_OFDM);
1331 &txpwr->mcs_20_siso[0], BRCMS_NUM_RATES_MCS_1_STREAM);
1333 &txpwr->mcs_20_cdd[0], BRCMS_NUM_RATES_MCS_1_STREAM);
1335 &txpwr->mcs_20_stbc[0], BRCMS_NUM_RATES_MCS_1_STREAM);
1337 &txpwr->mcs_20_mimo[0], BRCMS_NUM_RATES_MCS_2_STREAM);
1340 &txpwr->mcs_40_siso[0], BRCMS_NUM_RATES_MCS_1_STREAM);
1342 &txpwr->mcs_40_cdd[0], BRCMS_NUM_RATES_MCS_1_STREAM);
1344 &txpwr->mcs_40_stbc[0], BRCMS_NUM_RATES_MCS_1_STREAM);
1346 &txpwr->mcs_40_mimo[0], BRCMS_NUM_RATES_MCS_2_STREAM);
1644 wlc_phy_txpower_reg_limit_calc(struct brcms_phy *pi, struct txpwr_limits *txpwr,
1653 pi->txpwr_limit[rate1] = txpwr->cck[rate2];
1657 pi->txpwr_limit[rate1] = txpwr->ofdm[rate2];
1665 txpwr_ptr1 = txpwr->mcs_20_siso;
1666 txpwr_ptr2 = txpwr->ofdm;
1671 txpwr_ptr1 = txpwr->mcs_20_cdd;
1672 txpwr_ptr2 = txpwr->ofdm_cdd;
1677 txpwr_ptr1 = txpwr->mcs_40_siso;
1678 txpwr_ptr2 = txpwr->ofdm_40_siso;
1684 txpwr_ptr1 = txpwr->mcs_40_cdd;
1685 txpwr_ptr2 = txpwr->ofdm_40_cdd;
1711 txpwr_ptr1 = txpwr->ofdm;
1712 txpwr_ptr2 = txpwr->mcs_20_siso;
1717 txpwr_ptr1 = txpwr->ofdm_cdd;
1718 txpwr_ptr2 = txpwr->mcs_20_cdd;
1723 txpwr_ptr1 = txpwr->ofdm_40_siso;
1724 txpwr_ptr2 = txpwr->mcs_40_siso;
1729 txpwr_ptr1 = txpwr->ofdm_40_cdd;
1730 txpwr_ptr2 = txpwr->mcs_40_cdd;
1757 txpwr_ptr1 = txpwr->mcs_20_stbc;
1762 txpwr_ptr1 = txpwr->mcs_40_stbc;
1776 txpwr_ptr1 = txpwr->mcs_20_mimo;
1781 txpwr_ptr1 = txpwr->mcs_40_mimo;
1790 pi->txpwr_limit[WL_TX_POWER_MCS_32] = txpwr->mcs32;
1844 wlc_phy_txpower_limit_set(struct brcms_phy_pub *ppi, struct txpwr_limits *txpwr,
1849 wlc_phy_txpower_reg_limit_calc(pi, txpwr, chanspec);
1855 if (txpwr->mcs_20_siso[j])
1856 pi->txpwr_limit[i] = txpwr->mcs_20_siso[j];
1858 pi->txpwr_limit[i] = txpwr->ofdm[j];