broadcom/b43/phy_n.c

3614 			/* We disable enabled TX pwr ctl, save it's state */
4728 	u16 *save = nphy->tx_rx_cal_radio_saveregs;
4736 		save[off + 0] = b43_radio_read(dev, r + R2057_TX0_TX_SSI_MASTER);
4737 		save[off + 1] = b43_radio_read(dev, r + R2057_TX0_IQCAL_VCM_HG);
4738 		save[off + 2] = b43_radio_read(dev, r + R2057_TX0_IQCAL_IDAC);
4739 		save[off + 3] = b43_radio_read(dev, r + R2057_TX0_TSSI_VCM);
4740 		save[off + 4] = 0;
4741 		save[off + 5] = b43_radio_read(dev, r + R2057_TX0_TX_SSI_MUX);
4743 			save[off + 6] = b43_radio_read(dev, r + R2057_TX0_TSSIA);
4744 		save[off + 7] = b43_radio_read(dev, r + R2057_TX0_TSSIG);
4745 		save[off + 8] = b43_radio_read(dev, r + R2057_TX0_TSSI_MISC1);
4782 	u16 *save = nphy->tx_rx_cal_radio_saveregs;
4795 		save[offset + 0] = b43_radio_read(dev, B2055_CAL_RVARCTL);
4796 		save[offset + 1] = b43_radio_read(dev, B2055_CAL_LPOCTL);
4797 		save[offset + 2] = b43_radio_read(dev, B2055_CAL_TS);
4798 		save[offset + 3] = b43_radio_read(dev, B2055_CAL_RCCALRTS);
4799 		save[offset + 4] = b43_radio_read(dev, B2055_CAL_RCALRTS);
4800 		save[offset + 5] = b43_radio_read(dev, B2055_PADDRV);
4801 		save[offset + 6] = b43_radio_read(dev, B2055_XOCTL1);
4802 		save[offset + 7] = b43_radio_read(dev, B2055_XOCTL2);
4803 		save[offset + 8] = b43_radio_read(dev, B2055_XOREGUL);
4804 		save[offset + 9] = b43_radio_read(dev, B2055_XOMISC);
4805 		save[offset + 10] = b43_radio_read(dev, B2055_PLL_LFC1);
4842 		save[0] = b43_radio_read(dev, B2055_C1_TX_RF_IQCAL1);
4845 		save[1] = b43_radio_read(dev, B2055_C1_TX_RF_IQCAL2);
4848 		save[2] = b43_radio_read(dev, B2055_C2_TX_RF_IQCAL1);
4851 		save[3] = b43_radio_read(dev, B2055_C2_TX_RF_IQCAL2);
4854 		save[3] = b43_radio_read(dev, B2055_C1_PWRDET_RXTX);
4855 		save[4] = b43_radio_read(dev, B2055_C2_PWRDET_RXTX);
5339 	u16 save[2];
5351 	b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
5541 	b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, save);