Lines Matching defs:sc
150 static void ath9k_deinit_softc(struct ath_softc *sc);
177 struct ath_softc *sc = common->priv;
181 spin_lock_irqsave(&sc->sc_serial_rw, flags);
182 iowrite32(val, sc->mem + reg_offset);
183 spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
185 iowrite32(val, sc->mem + reg_offset);
192 struct ath_softc *sc = common->priv;
197 spin_lock_irqsave(&sc->sc_serial_rw, flags);
198 val = ioread32(sc->mem + reg_offset);
199 spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
201 val = ioread32(sc->mem + reg_offset);
215 static unsigned int __ath9k_reg_rmw(struct ath_softc *sc, u32 reg_offset,
220 val = ioread32(sc->mem + reg_offset);
223 iowrite32(val, sc->mem + reg_offset);
232 struct ath_softc *sc = common->priv;
237 spin_lock_irqsave(&sc->sc_serial_rw, flags);
238 val = __ath9k_reg_rmw(sc, reg_offset, set, clr);
239 spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
241 val = __ath9k_reg_rmw(sc, reg_offset, set, clr);
254 struct ath_softc *sc = hw->priv;
255 struct ath_hw *ah = sc->sc_ah;
261 if (sc->dfs_detector != NULL)
262 sc->dfs_detector->set_dfs_domain(sc->dfs_detector,
269 sc->cur_chan->txpower = 2 * ah->curchan->chan->max_power;
270 ath9k_ps_wakeup(sc);
271 ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
272 ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
273 sc->cur_chan->txpower,
274 &sc->cur_chan->cur_txpower);
275 ath9k_ps_restore(sc);
283 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
287 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
297 desc_len = sc->sc_ah->caps.tx_desc_len;
315 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_4KB_SPLITTRANS)) {
329 dd->dd_desc = dmam_alloc_coherent(sc->dev, dd->dd_desc_len,
344 bf = devm_kzalloc(sc->dev, bsize, GFP_KERNEL);
352 if (!(sc->sc_ah->caps.hw_caps &
375 bf = devm_kzalloc(sc->dev, bsize, GFP_KERNEL);
383 if (!(sc->sc_ah->caps.hw_caps &
406 static int ath9k_init_queues(struct ath_softc *sc)
410 sc->beacon.beaconq = ath9k_hw_beaconq_setup(sc->sc_ah);
411 sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
412 ath_cabq_update(sc);
414 sc->tx.uapsdq = ath_txq_setup(sc, ATH9K_TX_QUEUE_UAPSD, 0);
417 sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i);
418 sc->tx.txq_map[i]->mac80211_qnum = i;
423 static void ath9k_init_misc(struct ath_softc *sc)
425 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
432 sc->beacon.slottime = 9;
434 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++)
435 sc->beacon.bslot[i] = NULL;
437 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
438 sc->ant_comb.count = ATH_ANT_DIV_COMB_INIT_COUNT;
440 sc->spec_priv.ah = sc->sc_ah;
441 sc->spec_priv.spec_config.enabled = 0;
442 sc->spec_priv.spec_config.short_repeat = true;
443 sc->spec_priv.spec_config.count = 8;
444 sc->spec_priv.spec_config.endless = false;
445 sc->spec_priv.spec_config.period = 0xFF;
446 sc->spec_priv.spec_config.fft_period = 0xF;
449 static void ath9k_init_pcoem_platform(struct ath_softc *sc)
451 struct ath_hw *ah = sc->sc_ah;
461 if (sc->driver_data & (ATH9K_PCI_CUS198 |
467 sc->ant_comb.low_rssi_thresh = 20;
468 sc->ant_comb.fast_div_bias = 3;
471 (sc->driver_data & ATH9K_PCI_CUS198) ?
475 if (sc->driver_data & ATH9K_PCI_CUS217)
478 if (sc->driver_data & ATH9K_PCI_CUS252)
481 if (sc->driver_data & ATH9K_PCI_AR9565_1ANT)
484 if (sc->driver_data & ATH9K_PCI_AR9565_2ANT)
487 if (sc->driver_data & ATH9K_PCI_KILLER)
496 if (sc->driver_data & (ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_AR9565_2ANT)) {
497 if (!(sc->driver_data & ATH9K_PCI_BT_ANT_DIV))
501 if (sc->driver_data & ATH9K_PCI_BT_ANT_DIV) {
506 if (sc->driver_data & ATH9K_PCI_D3_L1_WAR) {
518 if (sc->driver_data & ATH9K_PCI_NO_PLL_PWRSAVE) {
523 if (sc->driver_data & ATH9K_PCI_LED_ACT_HI)
538 static int ath9k_eeprom_request(struct ath_softc *sc, const char *name)
541 struct ath_hw *ah = sc->sc_ah;
546 ec.ah = sc->sc_ah;
548 err = request_firmware_nowait(THIS_MODULE, 1, name, sc->dev, GFP_KERNEL,
567 static void ath9k_eeprom_release(struct ath_softc *sc)
569 release_firmware(sc->sc_ah->eeprom_blob);
572 static int ath9k_nvmem_request_eeprom(struct ath_softc *sc)
574 struct ath_hw *ah = sc->sc_ah;
580 cell = devm_nvmem_cell_get(sc->dev, "calibration");
611 ah->nvmem_blob = devm_kmemdup(sc->dev, buf, len, GFP_KERNEL);
623 static int ath9k_init_platform(struct ath_softc *sc)
625 struct ath9k_platform_data *pdata = sc->dev->platform_data;
626 struct ath_hw *ah = sc->sc_ah;
649 ret = ath9k_eeprom_request(sc, pdata->eeprom_name);
666 static int ath9k_of_init(struct ath_softc *sc)
668 struct device_node *np = sc->dev->of_node;
669 struct ath_hw *ah = sc->sc_ah;
686 ret = ath9k_eeprom_request(sc, eeprom_name);
699 static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
708 ah = devm_kzalloc(sc->dev, sizeof(struct ath_hw), GFP_KERNEL);
712 ah->dev = sc->dev;
713 ah->hw = sc->hw;
728 sc->sc_ah = ah;
729 sc->dfs_detector = dfs_pattern_detector_init(common, NL80211_DFS_UNSET);
730 sc->tx99_power = MAX_RATE_POWER + 1;
731 init_waitqueue_head(&sc->tx_wait);
732 sc->cur_chan = &sc->chanctx[0];
734 sc->cur_chan->hw_queue_base = 0;
740 common->hw = sc->hw;
741 common->priv = sc;
749 ath9k_init_pcoem_platform(sc);
751 ret = ath9k_init_platform(sc);
755 ret = ath9k_of_init(sc);
759 ret = ath9k_nvmem_request_eeprom(sc);
778 spin_lock_init(&sc->intr_lock);
779 spin_lock_init(&sc->sc_serial_rw);
780 spin_lock_init(&sc->sc_pm_lock);
781 spin_lock_init(&sc->chan_lock);
782 mutex_init(&sc->mutex);
783 tasklet_setup(&sc->intr_tq, ath9k_tasklet);
784 tasklet_setup(&sc->bcon_tasklet, ath9k_beacon_tasklet);
786 timer_setup(&sc->sleep_timer, ath_ps_full_sleep, 0);
787 INIT_WORK(&sc->hw_reset_work, ath_reset_work);
788 INIT_WORK(&sc->paprd_work, ath_paprd_calibrate);
789 INIT_DELAYED_WORK(&sc->hw_pll_work, ath_hw_pll_work);
790 INIT_DELAYED_WORK(&sc->hw_check_work, ath_hw_check_work);
792 ath9k_init_channel_context(sc);
806 ret = ath9k_init_queues(sc);
810 ret = ath9k_init_btcoex(sc);
818 ret = ath9k_init_p2p(sc);
822 ath9k_cmn_init_crypto(sc->sc_ah);
823 ath9k_init_misc(sc);
824 ath_chanctx_init(sc);
825 ath9k_offchannel_init(sc);
834 if (ATH_TXQ_SETUP(sc, i))
835 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
839 ath9k_eeprom_release(sc);
840 dev_kfree_skb_any(sc->tx99_skb);
844 static void ath9k_init_band_txpower(struct ath_softc *sc, int band)
848 struct ath_hw *ah = sc->sc_ah;
858 ath9k_cmn_get_channel(sc->hw, ah, &chandef);
863 static void ath9k_init_txpower_limits(struct ath_softc *sc)
865 struct ath_hw *ah = sc->sc_ah;
869 ath9k_init_band_txpower(sc, NL80211_BAND_2GHZ);
871 ath9k_init_band_txpower(sc, NL80211_BAND_5GHZ);
926 static void ath9k_set_mcc_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
928 struct ath_hw *ah = sc->sc_ah;
950 static void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
952 struct ath_hw *ah = sc->sc_ah;
969 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
977 if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || ath9k_modparam_nohwcrypt)
1027 sc->ant_rx = hw->wiphy->available_antennas_rx;
1028 sc->ant_tx = hw->wiphy->available_antennas_tx;
1030 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
1033 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
1038 ath9k_set_mcc_capab(sc, hw);
1052 int ath9k_init_device(u16 devid, struct ath_softc *sc,
1055 struct ieee80211_hw *hw = sc->hw;
1062 error = ath9k_init_softc(devid, sc, bus_ops);
1066 ah = sc->sc_ah;
1068 ath9k_set_hw_capab(sc, hw);
1071 error = ath_regd_init(&common->regulatory, sc->hw->wiphy,
1079 error = ath_tx_init(sc, ATH_TXBUF);
1084 error = ath_rx_init(sc, ATH_RXBUF);
1088 ath9k_init_txpower_limits(sc);
1092 sc->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(sc->hw,
1117 ath_init_leds(sc);
1118 ath_start_rfkill_poll(sc);
1123 ath9k_deinit_debug(sc);
1127 ath_rx_cleanup(sc);
1129 ath9k_deinit_softc(sc);
1137 static void ath9k_deinit_softc(struct ath_softc *sc)
1141 ath9k_deinit_p2p(sc);
1142 ath9k_deinit_btcoex(sc);
1145 if (ATH_TXQ_SETUP(sc, i))
1146 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
1148 del_timer_sync(&sc->sleep_timer);
1149 ath9k_hw_deinit(sc->sc_ah);
1150 if (sc->dfs_detector != NULL)
1151 sc->dfs_detector->exit(sc->dfs_detector);
1153 ath9k_eeprom_release(sc);
1156 void ath9k_deinit_device(struct ath_softc *sc)
1158 struct ieee80211_hw *hw = sc->hw;
1160 ath9k_ps_wakeup(sc);
1162 wiphy_rfkill_stop_polling(sc->hw->wiphy);
1163 ath_deinit_leds(sc);
1165 ath9k_ps_restore(sc);
1167 ath9k_deinit_debug(sc);
1170 ath_rx_cleanup(sc);
1171 ath9k_deinit_softc(sc);