ath/ath5k/ath5k.h

84 _ath5k_printk(const struct ath5k_hw *ah, const char *level,
124 #define AR5K_REG_WRITE_BITS(ah, _reg, _flags, _val)			\
125 	ath5k_hw_reg_write(ah, (ath5k_hw_reg_read(ah, _reg) & ~(_flags)) | \
128 #define AR5K_REG_MASKED_BITS(ah, _reg, _flags, _mask)			\
129 	ath5k_hw_reg_write(ah, (ath5k_hw_reg_read(ah, _reg) &		\
132 #define AR5K_REG_ENABLE_BITS(ah, _reg, _flags)				\
133 	ath5k_hw_reg_write(ah, ath5k_hw_reg_read(ah, _reg) | (_flags), _reg)
135 #define AR5K_REG_DISABLE_BITS(ah, _reg, _flags)			\
136 	ath5k_hw_reg_write(ah, ath5k_hw_reg_read(ah, _reg) & ~(_flags), _reg)
139 #define AR5K_REG_READ_Q(ah, _reg, _queue)				\
140 	(ath5k_hw_reg_read(ah, _reg) & (1 << _queue))			\
142 #define AR5K_REG_WRITE_Q(ah, _reg, _queue)				\
143 	ath5k_hw_reg_write(ah, (1 << _queue), _reg)
689 	(((ah->ah_txpower.txp_rates_power_table[(_r)]) & 0x3f) << (_v))	\
693 	(ah->ah_txpower.txp_rates_power_table[(_r)] & 0x3f) << (_v)	\
1182 	struct ath5k_hw *ah;			/* driver state */
1463 	int (*eeprom_read_mac)(struct ath5k_hw *ah, u8 *mac);
1472 int ath5k_hw_init(struct ath5k_hw *ah);
1473 void ath5k_hw_deinit(struct ath5k_hw *ah);
1475 int ath5k_sysfs_register(struct ath5k_hw *ah);
1476 void ath5k_sysfs_unregister(struct ath5k_hw *ah);
1479 int ath5k_hw_read_srev(struct ath5k_hw *ah);
1482 int ath5k_init_leds(struct ath5k_hw *ah);
1483 void ath5k_led_enable(struct ath5k_hw *ah);
1484 void ath5k_led_off(struct ath5k_hw *ah);
1485 void ath5k_unregister_leds(struct ath5k_hw *ah);
1489 int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, struct ieee80211_channel *channel);
1490 int ath5k_hw_on_hold(struct ath5k_hw *ah);
1491 int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1493 int ath5k_hw_register_timeout(struct ath5k_hw *ah, u32 reg, u32 flag, u32 val,
1499 unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec);
1500 unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock);
1501 void ath5k_hw_set_clockrate(struct ath5k_hw *ah);
1505 void ath5k_hw_start_rx_dma(struct ath5k_hw *ah);
1506 u32 ath5k_hw_get_rxdp(struct ath5k_hw *ah);
1507 int ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr);
1508 int ath5k_hw_start_tx_dma(struct ath5k_hw *ah, unsigned int queue);
1509 int ath5k_hw_stop_beacon_queue(struct ath5k_hw *ah, unsigned int queue);
1510 u32 ath5k_hw_get_txdp(struct ath5k_hw *ah, unsigned int queue);
1511 int ath5k_hw_set_txdp(struct ath5k_hw *ah, unsigned int queue,
1513 int ath5k_hw_update_tx_triglevel(struct ath5k_hw *ah, bool increase);
1515 bool ath5k_hw_is_intr_pending(struct ath5k_hw *ah);
1516 int ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask);
1517 enum ath5k_int ath5k_hw_set_imr(struct ath5k_hw *ah, enum ath5k_int new_mask);
1518 void ath5k_hw_update_mib_counters(struct ath5k_hw *ah);
1520 void ath5k_hw_dma_init(struct ath5k_hw *ah);
1521 int ath5k_hw_dma_stop(struct ath5k_hw *ah);
1524 int ath5k_eeprom_init(struct ath5k_hw *ah);
1525 void ath5k_eeprom_detach(struct ath5k_hw *ah);
1526 int ath5k_eeprom_mode_from_channel(struct ath5k_hw *ah,
1531 int ath5k_hw_get_frame_duration(struct ath5k_hw *ah, enum nl80211_band band,
1533 unsigned int ath5k_hw_get_default_slottime(struct ath5k_hw *ah);
1534 unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah);
1535 int ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype opmode);
1536 void ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class);
1538 int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac);
1539 void ath5k_hw_set_bssid(struct ath5k_hw *ah);
1540 void ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask);
1541 void ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1);
1542 u32 ath5k_hw_get_rx_filter(struct ath5k_hw *ah);
1543 void ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter);
1545 void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah);
1546 void ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah);
1548 u64 ath5k_hw_get_tsf64(struct ath5k_hw *ah);
1549 void ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64);
1550 void ath5k_hw_reset_tsf(struct ath5k_hw *ah);
1551 void ath5k_hw_init_beacon_timers(struct ath5k_hw *ah, u32 next_beacon,
1553 bool ath5k_hw_check_beacon_timers(struct ath5k_hw *ah, int intval);
1555 void ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode);
1558 int ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue,
1560 int ath5k_hw_set_tx_queueprops(struct ath5k_hw *ah, int queue,
1562 int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah,
1565 void ath5k_hw_set_tx_retry_limits(struct ath5k_hw *ah,
1567 u32 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue);
1568 void ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue);
1569 int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue);
1570 int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time);
1572 int ath5k_hw_init_queues(struct ath5k_hw *ah);
1575 int ath5k_hw_init_desc_functions(struct ath5k_hw *ah);
1576 int ath5k_hw_setup_rx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc,
1578 int ath5k_hw_setup_mrr_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc,
1584 void ath5k_hw_set_ledstate(struct ath5k_hw *ah, unsigned int state);
1585 int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio);
1586 int ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio);
1587 u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio);
1588 int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val);
1589 void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio,
1594 void ath5k_rfkill_hw_start(struct ath5k_hw *ah);
1595 void ath5k_rfkill_hw_stop(struct ath5k_hw *ah);
1599 int ath5k_hw_set_capabilities(struct ath5k_hw *ah);
1600 int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, u16 assoc_id);
1601 int ath5k_hw_disable_pspoll(struct ath5k_hw *ah);
1605 int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel);
1610 u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, enum nl80211_band band);
1611 int ath5k_hw_phy_disable(struct ath5k_hw *ah);
1613 enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah);
1614 int ath5k_hw_rfgain_opt_init(struct ath5k_hw *ah);
1616 bool ath5k_channel_ok(struct ath5k_hw *ah, struct ieee80211_channel *channel);
1618 void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah);
1619 int ath5k_hw_phy_calibrate(struct ath5k_hw *ah,
1621 void ath5k_hw_update_noise_floor(struct ath5k_hw *ah);
1623 bool ath5k_hw_chan_has_spur_noise(struct ath5k_hw *ah,
1626 void ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode);
1627 void ath5k_hw_set_antenna_switch(struct ath5k_hw *ah, u8 ee_mode);
1629 int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower);
1631 int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
1638 static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
1640 	return &ah->common;
1643 static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
1645 	return &(ath5k_hw_common(ah)->regulatory);
1651 static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
1656 	    (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
1659 	return ah->iobase + reg;
1662 static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
1664 	return ioread32(ath5k_ahb_reg(ah, reg));
1667 static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
1669 	iowrite32(val, ath5k_ahb_reg(ah, reg));
1674 static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
1676 	return ioread32(ah->iobase + reg);
1679 static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
1681 	iowrite32(val, ah->iobase + reg);
1686 static inline enum ath_bus_type ath5k_get_bus_type(struct ath5k_hw *ah)
1688 	return ath5k_hw_common(ah)->bus_ops->ath_bus_type;
1696 static inline bool ath5k_hw_nvram_read(struct ath5k_hw *ah, u32 off, u16 *data)
1698 	struct ath_common *common = ath5k_hw_common(ah);