Lines Matching refs:ab

56 	ath11k_dbg(ar->ab, ATH11K_DBG_REG,
66 ath11k_warn(ar->ab, "Unexpected Regulatory event for this wiphy\n");
71 ath11k_dbg(ar->ab, ATH11K_DBG_REG,
77 ath11k_dbg(ar->ab, ATH11K_DBG_REG, "Country is already set\n");
85 if (ar->ab->hw_params.current_cc_support) {
90 ath11k_warn(ar->ab,
99 ath11k_warn(ar->ab,
122 ath11k_dbg(ar->ab, ATH11K_DBG_REG,
126 ath11k_dbg(ar->ab, ATH11K_DBG_REG,
136 ath11k_dbg(ar->ab, ATH11K_DBG_REG,
139 ath11k_dbg(ar->ab, ATH11K_DBG_REG,
210 ath11k_dbg(ar->ab, ATH11K_DBG_WMI,
246 struct ath11k_base *ab;
248 ab = ar->ab;
251 spin_lock_bh(&ab->base_lock);
254 if (ab->new_regd[pdev_id]) {
255 regd = ab->new_regd[pdev_id];
262 if (ab->default_regd[pdev_id]) {
263 regd = ab->default_regd[pdev_id];
265 ath11k_warn(ab,
273 spin_unlock_bh(&ab->base_lock);
284 spin_unlock_bh(&ab->base_lock);
306 ath11k_warn(ab, "failed to perform regd update : %d\n", ret);
547 ath11k_reg_update_weather_radar_band(struct ath11k_base *ab,
574 ath11k_dbg(ab, ATH11K_DBG_REG,
597 ath11k_dbg(ab, ATH11K_DBG_REG,
616 ath11k_dbg(ab, ATH11K_DBG_REG,
643 ath11k_reg_build_regd(struct ath11k_base *ab,
708 ath11k_dbg(ab, ATH11K_DBG_REG,
764 ath11k_reg_update_weather_radar_band(ab, tmp_regd,
771 ath11k_dbg(ab, ATH11K_DBG_REG,
778 ath11k_dbg(ab, ATH11K_DBG_REG,
790 default_regd = ab->default_regd[reg_info->phy_id];
798 ath11k_warn(ab, "Unable to create intersected regdomain\n");
837 int ath11k_reg_handle_chan_list(struct ath11k_base *ab,
847 ath11k_dbg(ab, ATH11K_DBG_WMI, "event reg handle chan list");
854 ath11k_warn(ab, "Failed to set the requested Country regulatory setting\n");
863 spin_lock_bh(&ab->base_lock);
864 if (test_bit(ATH11K_FLAG_RECOVERY, &ab->dev_flags) &&
865 ab->default_regd[pdev_idx]) {
866 spin_unlock_bh(&ab->base_lock);
869 spin_unlock_bh(&ab->base_lock);
871 if (pdev_idx >= ab->num_radios) {
880 if (ab->hw_params.single_pdev_only &&
881 pdev_idx < ab->hw_params.num_rxmda_per_pdev)
889 if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] &&
890 !memcmp((char *)ab->default_regd[pdev_idx]->alpha2,
898 if (ab->default_regd[pdev_idx] &&
900 ab->default_regd[pdev_idx]->alpha2) &&
904 ar = ab->pdevs[pdev_idx].ar;
907 ath11k_dbg(ab, ATH11K_DBG_WMI,
911 regd = ath11k_reg_build_regd(ab, reg_info, intersect, vdev_type, power_type);
913 ath11k_warn(ab, "failed to build regd from reg_info\n");
918 ath11k_reg_reset_info(&ab->reg_info_store[pdev_idx]);
919 ab->reg_info_store[pdev_idx] = *reg_info;
922 spin_lock_bh(&ab->base_lock);
923 if (ab->default_regd[pdev_idx]) {
931 ar = ab->pdevs[pdev_idx].ar;
932 kfree(ab->new_regd[pdev_idx]);
933 ab->new_regd[pdev_idx] = regd;
934 queue_work(ab->workqueue, &ar->regd_update_work);
939 ab->default_regd[pdev_idx] = regd;
941 ab->dfs_region = reg_info->dfs_region;
942 spin_unlock_bh(&ab->base_lock);
1005 void ath11k_reg_free(struct ath11k_base *ab)
1009 for (i = 0; i < ab->num_radios; i++)
1010 ath11k_reg_reset_info(&ab->reg_info_store[i]);
1012 kfree(ab->reg_info_store);
1013 ab->reg_info_store = NULL;
1015 for (i = 0; i < ab->hw_params.max_radios; i++) {
1016 kfree(ab->default_regd[i]);
1017 kfree(ab->new_regd[i]);