net/usb/asix_devices.c

73 	u32 phy_id;
78 		phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
89 	phy_id = (phy_reg & 0xffff) << 16;
91 	phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
95 	phy_id |= (phy_reg & 0xffff);
97 	return phy_id;
208 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits);
210 	/* give phy_id a chance to process reset */
215 		if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR)
222 	netdev_err(dev->net, "BMCR_RESET timeout on phy_id %d\n",
223 		   dev->mii.phy_id);
266 	dev->mii.phy_id = asix_read_phy_addr(dev, true);
267 	if (dev->mii.phy_id < 0)
268 		return dev->mii.phy_id;
276 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
419 	if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
509 	if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
525 		phy14h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
527 		phy15h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
529 		phy16h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
538 			asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
542 			asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
546 			asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
982 	reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
985 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
989 		reg = asix_mdio_read(dev->net, dev->mii.phy_id,
995 		asix_mdio_write(dev->net, dev->mii.phy_id,
998 		reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1012 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
1013 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
1014 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
1015 		asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
1016 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1019 		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
1020 		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
1021 		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1029 	u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1048 	asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1127 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1129 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1280 	dev->mii.phy_id = asix_read_phy_addr(dev, true);
1281 	if (dev->mii.phy_id < 0)
1282 		return dev->mii.phy_id;