net/phy/vitesse.c

83 static int vsc824x_add_skew(struct phy_device *phydev)
88 	extcon = phy_read(phydev, MII_VSC8244_EXT_CON1);
99 	err = phy_write(phydev, MII_VSC8244_EXT_CON1, extcon);
104 static int vsc824x_config_init(struct phy_device *phydev)
108 	err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
113 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
114 		err = vsc824x_add_skew(phydev);
121 static int vsc73xx_read_page(struct phy_device *phydev)
123 	return __phy_read(phydev, VSC73XX_EXT_PAGE_ACCESS);
126 static int vsc73xx_write_page(struct phy_device *phydev, int page)
128 	return __phy_write(phydev, VSC73XX_EXT_PAGE_ACCESS, page);
131 static void vsc73xx_config_init(struct phy_device *phydev)
134 	phy_write(phydev, 0x1f, 0x2a30);
135 	phy_modify(phydev, 0x0c, 0x0300, 0x0200);
136 	phy_write(phydev, 0x1f, 0x0000);
139 	phy_modify(phydev, MII_TPISTATUS, 0xff00, 0x0061);
142 static int vsc738x_config_init(struct phy_device *phydev)
150 	phy_write(phydev, 0x1f, 0x2a30);
151 	phy_modify(phydev, 0x08, 0x0200, 0x0200);
152 	phy_write(phydev, 0x1f, 0x52b5);
153 	phy_write(phydev, 0x10, 0xb68a);
154 	phy_modify(phydev, 0x12, 0xff07, 0x0003);
155 	phy_modify(phydev, 0x11, 0x00ff, 0x00a2);
156 	phy_write(phydev, 0x10, 0x968a);
157 	phy_write(phydev, 0x1f, 0x2a30);
158 	phy_modify(phydev, 0x08, 0x0200, 0x0000);
159 	phy_write(phydev, 0x1f, 0x0000);
162 	rev = phy_read(phydev, MII_PHYSID2);
167 		phy_write(phydev, 0x1f, 0x2a30);
168 		phy_modify(phydev, 0x08, 0x0200, 0x0200);
169 		phy_write(phydev, 0x1f, 0x52b5);
170 		phy_write(phydev, 0x12, 0x0000);
171 		phy_write(phydev, 0x11, 0x0689);
172 		phy_write(phydev, 0x10, 0x8f92);
173 		phy_write(phydev, 0x1f, 0x52b5);
174 		phy_write(phydev, 0x12, 0x0000);
175 		phy_write(phydev, 0x11, 0x0e35);
176 		phy_write(phydev, 0x10, 0x9786);
177 		phy_write(phydev, 0x1f, 0x2a30);
178 		phy_modify(phydev, 0x08, 0x0200, 0x0000);
179 		phy_write(phydev, 0x17, 0xff80);
180 		phy_write(phydev, 0x17, 0x0000);
183 	phy_write(phydev, 0x1f, 0x0000);
184 	phy_write(phydev, 0x12, 0x0048);
187 		phy_write(phydev, 0x1f, 0x2a30);
188 		phy_write(phydev, 0x14, 0x6600);
189 		phy_write(phydev, 0x1f, 0x0000);
190 		phy_write(phydev, 0x18, 0xa24e);
192 		phy_write(phydev, 0x1f, 0x2a30);
193 		phy_modify(phydev, 0x16, 0x0fc0, 0x0240);
194 		phy_modify(phydev, 0x14, 0x6000, 0x4000);
198 		phy_write(phydev, 0x1f, 0x0001);
199 		phy_modify(phydev, 0x14, 0xe000, 0x6000);
200 		phy_write(phydev, 0x1f, 0x0000);
203 	vsc73xx_config_init(phydev);
208 static int vsc739x_config_init(struct phy_device *phydev)
215 	phy_write(phydev, 0x1f, 0x2a30);
216 	phy_modify(phydev, 0x08, 0x0200, 0x0200);
217 	phy_write(phydev, 0x1f, 0x52b5);
218 	phy_write(phydev, 0x10, 0xb68a);
219 	phy_modify(phydev, 0x12, 0xff07, 0x0003);
220 	phy_modify(phydev, 0x11, 0x00ff, 0x00a2);
221 	phy_write(phydev, 0x10, 0x968a);
222 	phy_write(phydev, 0x1f, 0x2a30);
223 	phy_modify(phydev, 0x08, 0x0200, 0x0000);
224 	phy_write(phydev, 0x1f, 0x0000);
226 	phy_write(phydev, 0x1f, 0x0000);
227 	phy_write(phydev, 0x12, 0x0048);
228 	phy_write(phydev, 0x1f, 0x2a30);
229 	phy_modify(phydev, 0x16, 0x0fc0, 0x0240);
230 	phy_modify(phydev, 0x14, 0x6000, 0x4000);
231 	phy_write(phydev, 0x1f, 0x0001);
232 	phy_modify(phydev, 0x14, 0xe000, 0x6000);
233 	phy_write(phydev, 0x1f, 0x0000);
235 	vsc73xx_config_init(phydev);
240 static int vsc73xx_config_aneg(struct phy_device *phydev)
254 static int vsc8601_add_skew(struct phy_device *phydev)
258 	ret = phy_read(phydev, MII_VSC8601_EPHY_CTL);
263 	return phy_write(phydev, MII_VSC8601_EPHY_CTL, ret);
266 static int vsc8601_config_init(struct phy_device *phydev)
270 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
271 		ret = vsc8601_add_skew(phydev);
279 static int vsc82xx_config_intr(struct phy_device *phydev)
283 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
287 		err = phy_write(phydev, MII_VSC8244_IMASK,
288 			(phydev->drv->phy_id == PHY_ID_VSC8234 ||
289 			 phydev->drv->phy_id == PHY_ID_VSC8244 ||
290 			 phydev->drv->phy_id == PHY_ID_VSC8572 ||
291 			 phydev->drv->phy_id == PHY_ID_VSC8601) ?
298 		err = phy_read(phydev, MII_VSC8244_ISTAT);
303 		err = phy_write(phydev, MII_VSC8244_IMASK, 0);
309 static irqreturn_t vsc82xx_handle_interrupt(struct phy_device *phydev)
313 	if (phydev->drv->phy_id == PHY_ID_VSC8244 ||
314 	    phydev->drv->phy_id == PHY_ID_VSC8572 ||
315 	    phydev->drv->phy_id == PHY_ID_VSC8601)
320 	irq_status = phy_read(phydev, MII_VSC8244_ISTAT);
322 		phy_error(phydev);
329 	phy_trigger_machine(phydev);
334 static int vsc8221_config_init(struct phy_device *phydev)
338 	err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
348  * @phydev: target phy_device struct
353 static int vsc82x4_config_autocross_enable(struct phy_device *phydev)
357 	if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed > SPEED_100)
361 	ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_ACCESS, 0x52b5);
363 		ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_18E, 0x0012);
365 		ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_17E, 0x2803);
367 		ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_16E, 0x87fa);
370 		ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_ACCESS, 0x0000);
372 		phy_write(phydev, MII_VSC82X4_EXT_PAGE_ACCESS, 0x0000);
378  * @phydev: target phy_device struct
385 static int vsc82x4_config_aneg(struct phy_device *phydev)
392 	if (phydev->autoneg != AUTONEG_ENABLE && phydev->speed <= SPEED_100) {
393 		ret = genphy_setup_forced(phydev);
398 		return vsc82x4_config_autocross_enable(phydev);
401 	return genphy_config_aneg(phydev);