Lines Matching refs:ret

17 	int ret;
22 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
24 if (ret)
26 return ret;
32 int ret;
36 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
38 if (ret)
40 return ret;
48 int ret;
50 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
55 if (ret)
57 return ret;
75 int ret;
77 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
84 if (ret)
86 return ret;
97 int ret;
105 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
108 if (ret)
110 return ret;
121 int ret;
130 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
133 if (ret)
135 return ret;
147 int ret;
154 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
157 if (ret)
159 return ret;
169 int ret;
176 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
179 if (ret)
181 return ret;
191 int ret;
195 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
198 if (ret)
200 return ret;
210 int ret;
214 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
217 if (ret)
219 return ret;
225 int ret;
227 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
230 if (ret)
232 return ret;
237 int ret;
239 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
242 if (ret)
244 return ret;
256 int ret;
262 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
265 if (ret)
267 return ret;
276 int ret;
280 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
283 if (ret)
285 return ret;
294 int ret;
300 ret = vsc85xx_csr_write(phydev, MACRO_CTRL,
302 if (ret)
304 return ret;
323 int ret;
328 ret = pll5g_detune(phydev);
329 if (ret)
330 return ret;
333 ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 0);
334 if (ret)
335 return ret;
336 ret = vsc85xx_sd6g_common_cfg_wr(phydev, 0, 0, 0, qrate, if_mode, 0);
337 if (ret)
338 return ret;
339 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
340 if (ret)
341 return ret;
342 ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 0);
343 if (ret)
344 return ret;
348 ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_mm, 0, 0);
349 if (ret)
350 return ret;
351 ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_mm, 15, 0, 1);
352 if (ret)
353 return ret;
354 ret = vsc85xx_sd6g_ib_cfg2_wr(phydev, 3, 13, 5);
355 if (ret)
356 return ret;
357 ret = vsc85xx_sd6g_ib_cfg3_wr(phydev, 0, 31, 1, 31);
358 if (ret)
359 return ret;
360 ret = vsc85xx_sd6g_ib_cfg4_wr(phydev, 63, 63, 2, 63);
361 if (ret)
362 return ret;
363 ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 0);
364 if (ret)
365 return ret;
366 ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 1);
367 if (ret)
368 return ret;
369 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
370 if (ret)
371 return ret;
374 ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 1);
375 if (ret)
376 return ret;
377 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
378 if (ret)
379 return ret;
384 ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
385 if (ret)
386 return ret;
396 ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 0);
397 if (ret)
398 return ret;
399 ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 1);
400 if (ret)
401 return ret;
402 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
403 if (ret)
404 return ret;
407 ret = vsc85xx_sd6g_gp_cfg_wr(phydev, 768);
408 if (ret)
409 return ret;
410 ret = vsc85xx_sd6g_dft_cfg2_wr(phydev, 0, 2, 0, 0, 0, 1);
411 if (ret)
412 return ret;
413 ret = vsc85xx_sd6g_dft_cfg0_wr(phydev, 0, 0, 1);
414 if (ret)
415 return ret;
416 ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 2);
417 if (ret)
418 return ret;
419 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
420 if (ret)
421 return ret;
424 ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_cal, 15, 1, 0);
425 if (ret)
426 return ret;
427 ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_cal, 0, 0);
428 if (ret)
429 return ret;
430 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
431 if (ret)
432 return ret;
435 ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj,
437 if (ret)
438 return ret;
439 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
440 if (ret)
441 return ret;
445 ret = vsc85xx_sd6g_gp_cfg_wr(phydev, 769);
446 if (ret)
447 return ret;
448 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
449 if (ret)
450 return ret;
452 ret = vsc85xx_sd6g_gp_cfg_wr(phydev, 768);
453 if (ret)
454 return ret;
455 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
456 if (ret)
457 return ret;
460 ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_cal, 15, 1, 1);
461 if (ret)
462 return ret;
463 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
464 if (ret)
465 return ret;
466 ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_cal, 15, 0, 1);
467 if (ret)
468 return ret;
469 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
470 if (ret)
471 return ret;
477 ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
478 if (ret)
479 return ret;
489 ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_mm, 0, 1);
490 if (ret)
491 return ret;
492 ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_mm, 15, 0, 1);
493 if (ret)
494 return ret;
495 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
496 if (ret)
497 return ret;
500 ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 0);
501 if (ret)
502 return ret;
503 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
504 if (ret)
505 return ret;
508 ret = vsc85xx_sd6g_dft_cfg2_wr(phydev, 0, 0, 0, 0, 0, 0);
509 if (ret)
510 return ret;
511 ret = vsc85xx_sd6g_dft_cfg0_wr(phydev, 0, 0, 0);
512 if (ret)
513 return ret;
514 ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 0);
515 if (ret)
516 return ret;
517 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
518 if (ret)
519 return ret;
522 ret = pll5g_tune(phydev);
523 if (ret)
524 return ret;
528 ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 0);
529 if (ret)
530 return ret;
531 ret = vsc85xx_sd6g_common_cfg_wr(phydev, 0, 1, 0, qrate, if_mode, 0);
532 if (ret)
533 return ret;
534 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
535 if (ret)
536 return ret;
540 ret = phy_base_read(phydev, MSCC_PHY_MAC_CFG_FASTLINK);
541 if ((ret & MAC_CFG_MASK) == MAC_CFG_QSGMII) {
550 ret = vsc8584_cmd(phydev, val);
551 if (ret) {
553 __func__, ret);
554 return ret;
558 } else if ((ret & MAC_CFG_MASK) == MAC_CFG_SGMII) {
568 ret = vsc8584_cmd(phydev, val);
569 if (ret) {
571 __func__, ret);
572 return ret;
578 __func__, ret);
581 ret = phy_update_mcb_s6g(phydev, PHY_S6G_LCPLL_CFG, 0);
582 if (ret)
583 return ret;
584 ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
585 if (ret)
586 return ret;
587 ret = vsc85xx_pll5g_cfg0_wr(phydev, 4);
588 if (ret)
589 return ret;
590 ret = phy_commit_mcb_s6g(phydev, PHY_S6G_LCPLL_CFG, 0);
591 if (ret)
592 return ret;
593 ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 0);
594 if (ret)
595 return ret;
596 ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_mm, 0, 1);
597 if (ret)
598 return ret;
599 ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_mm, 15, 0, 1);
600 if (ret)
601 return ret;
602 ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 0);
603 if (ret)
604 return ret;
605 ret = vsc85xx_sd6g_ib_cfg2_wr(phydev, 3, 13, 5);
606 if (ret)
607 return ret;
608 ret = vsc85xx_sd6g_ib_cfg3_wr(phydev, 0, 31, 1, 31);
609 if (ret)
610 return ret;
611 ret = vsc85xx_sd6g_ib_cfg4_wr(phydev, 63, 63, 2, 63);
612 if (ret)
613 return ret;
614 ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 1);
615 if (ret)
616 return ret;
617 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
618 if (ret)
619 return ret;
622 ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 1);
623 if (ret)
624 return ret;
625 ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
626 if (ret)
627 return ret;
633 ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);
634 if (ret)
635 return ret;
645 ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 0);
646 if (ret)
647 return ret;