net/phy/marvell-88x2222.c

61 static int mv2222_tx_enable(struct phy_device *phydev)
63 	return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS,
68 static int mv2222_tx_disable(struct phy_device *phydev)
70 	return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS,
74 static int mv2222_soft_reset(struct phy_device *phydev)
78 	ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_PORT_RST,
83 	return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND2, MV_PORT_RST,
88 static int mv2222_disable_aneg(struct phy_device *phydev)
90 	int ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_CTRL,
95 	return mv2222_soft_reset(phydev);
98 static int mv2222_enable_aneg(struct phy_device *phydev)
100 	int ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_CTRL,
105 	return mv2222_soft_reset(phydev);
108 static int mv2222_set_sgmii_speed(struct phy_device *phydev)
110 	struct mv2222_data *priv = phydev->priv;
112 	switch (phydev->speed) {
119 			return phy_modify_mmd(phydev, MDIO_MMD_PCS,
130 			return phy_modify_mmd(phydev, MDIO_MMD_PCS,
140 			return phy_modify_mmd(phydev, MDIO_MMD_PCS,
149 static bool mv2222_is_10g_capable(struct phy_device *phydev)
151 	struct mv2222_data *priv = phydev->priv;
167 static bool mv2222_is_1gbx_capable(struct phy_device *phydev)
169 	struct mv2222_data *priv = phydev->priv;
175 static bool mv2222_is_sgmii_capable(struct phy_device *phydev)
177 	struct mv2222_data *priv = phydev->priv;
193 static int mv2222_config_line(struct phy_device *phydev)
195 	struct mv2222_data *priv = phydev->priv;
199 		return phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_PCS_CONFIG,
202 		return phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_PCS_CONFIG,
205 		return phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_PCS_CONFIG,
213 static int mv2222_swap_line_type(struct phy_device *phydev)
215 	struct mv2222_data *priv = phydev->priv;
221 		if (mv2222_is_1gbx_capable(phydev)) {
226 		if (mv2222_is_sgmii_capable(phydev)) {
234 		if (mv2222_is_10g_capable(phydev)) {
245 		ret = mv2222_config_line(phydev);
253 static int mv2222_setup_forced(struct phy_device *phydev)
255 	struct mv2222_data *priv = phydev->priv;
259 		if (phydev->speed < SPEED_10000 &&
260 		    phydev->speed != SPEED_UNKNOWN) {
261 			ret = mv2222_swap_line_type(phydev);
268 		ret = mv2222_set_sgmii_speed(phydev);
273 	return mv2222_disable_aneg(phydev);
276 static int mv2222_config_aneg(struct phy_device *phydev)
278 	struct mv2222_data *priv = phydev->priv;
285 	if (phydev->autoneg == AUTONEG_DISABLE ||
287 		return mv2222_setup_forced(phydev);
292 	ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_ADVERTISE,
299 	return mv2222_enable_aneg(phydev);
302 static int mv2222_aneg_done(struct phy_device *phydev)
306 	if (mv2222_is_10g_capable(phydev)) {
307 		ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1);
315 	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT);
323 static int mv2222_read_status_10g(struct phy_device *phydev)
328 	val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1);
336 		phydev->autoneg = AUTONEG_DISABLE;
337 		phydev->speed = SPEED_10000;
338 		phydev->duplex = DUPLEX_FULL;
340 		if (phydev->autoneg == AUTONEG_ENABLE) {
346 				val = mv2222_swap_line_type(phydev);
350 				return mv2222_config_aneg(phydev);
359 static int mv2222_read_status_1g(struct phy_device *phydev)
364 	val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT);
368 	if (phydev->autoneg == AUTONEG_ENABLE &&
375 			val = mv2222_swap_line_type(phydev);
379 			return mv2222_config_aneg(phydev);
390 	val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_PHY_STAT);
396 			phydev->duplex = DUPLEX_FULL;
398 			phydev->duplex = DUPLEX_HALF;
401 			phydev->speed = SPEED_1000;
403 			phydev->speed = SPEED_100;
405 			phydev->speed = SPEED_10;
411 static bool mv2222_link_is_operational(struct phy_device *phydev)
413 	struct mv2222_data *priv = phydev->priv;
416 	val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_RX_SIGNAL_DETECT);
420 	if (phydev->sfp_bus && !priv->sfp_link)
426 static int mv2222_read_status(struct phy_device *phydev)
428 	struct mv2222_data *priv = phydev->priv;
431 	phydev->link = 0;
432 	phydev->speed = SPEED_UNKNOWN;
433 	phydev->duplex = DUPLEX_UNKNOWN;
435 	if (!mv2222_link_is_operational(phydev))
439 		link = mv2222_read_status_10g(phydev);
441 		link = mv2222_read_status_1g(phydev);
446 	phydev->link = link;
451 static int mv2222_resume(struct phy_device *phydev)
453 	return mv2222_tx_enable(phydev);
456 static int mv2222_suspend(struct phy_device *phydev)
458 	return mv2222_tx_disable(phydev);
461 static int mv2222_get_features(struct phy_device *phydev)
468 static int mv2222_config_init(struct phy_device *phydev)
470 	if (phydev->interface != PHY_INTERFACE_MODE_XAUI)
479 	struct phy_device *phydev = upstream;
487 	priv = phydev->priv;
488 	dev = &phydev->mdio.dev;
490 	sfp_parse_support(phydev->sfp_bus, id, sfp_supported, interfaces);
491 	phydev->port = sfp_parse_port(phydev->sfp_bus, id, sfp_supported);
492 	sfp_interface = sfp_select_interface(phydev->sfp_bus, sfp_supported);
505 	linkmode_and(priv->supported, phydev->supported, sfp_supported);
507 	ret = mv2222_config_line(phydev);
511 	if (mutex_trylock(&phydev->lock)) {
512 		ret = mv2222_config_aneg(phydev);
513 		mutex_unlock(&phydev->lock);
521 	struct phy_device *phydev = upstream;
524 	priv = phydev->priv;
528 	phydev->port = PORT_NONE;
533 	struct phy_device *phydev = upstream;
536 	priv = phydev->priv;
542 	struct phy_device *phydev = upstream;
545 	priv = phydev->priv;
558 static int mv2222_probe(struct phy_device *phydev)
560 	struct device *dev = &phydev->mdio.dev;
584 	linkmode_copy(phydev->supported, supported);
591 	phydev->priv = priv;
593 	return phy_sfp_probe(phydev, &sfp_phy_ops);