net/phy/broadcom.c

24 #define BRCM_PHY_MODEL(phydev) \
25 	((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)
27 #define BRCM_PHY_REV(phydev) \
28 	((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))
41 static bool bcm54xx_phy_can_wakeup(struct phy_device *phydev)
43 	struct bcm54xx_phy_priv *priv = phydev->priv;
45 	return phy_interrupt_is_valid(phydev) || priv->wake_irq >= 0;
48 static int bcm54xx_config_clock_delay(struct phy_device *phydev)
53 	val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
55 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||
56 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
60 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
61 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
65 	rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
71 	val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL);
72 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||
73 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
77 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
78 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
82 	rc = bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val);
89 static int bcm54210e_config_init(struct phy_device *phydev)
93 	bcm54xx_config_clock_delay(phydev);
95 	if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) {
96 		val = phy_read(phydev, MII_CTRL1000);
98 		phy_write(phydev, MII_CTRL1000, val);
104 static int bcm54612e_config_init(struct phy_device *phydev)
108 	bcm54xx_config_clock_delay(phydev);
111 	if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) {
114 		reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0);
115 		err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0,
125 static int bcm54616s_config_init(struct phy_device *phydev)
129 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
130 	    phydev->interface != PHY_INTERFACE_MODE_1000BASEX)
135 	val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
140 	rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
146 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE);
150 	rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);
155 	rc = phy_set_bits(phydev, MII_BMCR, BMCR_PDOWN);
161 	val |= phydev->interface == PHY_INTERFACE_MODE_SGMII ?
164 	rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);
169 	rc = phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);
175 	rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);
180 	return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);
184 static int bcm50610_a0_workaround(struct phy_device *phydev)
188 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH0,
194 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH3,
199 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75,
204 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP96,
209 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP97,
215 static int bcm54xx_phydsp_config(struct phy_device *phydev)
220 	err = bcm54xx_auxctl_write(phydev,
227 	if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||
228 	    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) {
230 		err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP08,
235 		if (phydev->drv->phy_id == PHY_ID_BCM50610) {
236 			err = bcm50610_a0_workaround(phydev);
242 	if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM57780) {
245 		val = bcm_phy_read_exp(phydev, MII_BCM54XX_EXP_EXP75);
250 		err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75, val);
255 	err2 = bcm54xx_auxctl_write(phydev,
263 static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
270 	if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 &&
271 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 &&
272 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M &&
273 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54210E &&
274 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54810 &&
275 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811)
278 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3);
284 	if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||
285 	     BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&
286 	    BRCM_PHY_REV(phydev) >= 0x3) {
293 		if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) {
294 			if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811) {
302 	if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
307 	if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) {
308 		if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54210E ||
309 		    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810 ||
310 		    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54811)
317 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val);
319 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_APD);
325 	if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
331 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_APD, val);
334 static void bcm54xx_ptp_stop(struct phy_device *phydev)
336 	struct bcm54xx_phy_priv *priv = phydev->priv;
342 static void bcm54xx_ptp_config_init(struct phy_device *phydev)
344 	struct bcm54xx_phy_priv *priv = phydev->priv;
347 		bcm_ptp_config_init(phydev);
350 static int bcm54xx_config_init(struct phy_device *phydev)
354 	reg = phy_read(phydev, MII_BCM54XX_ECR);
360 	err = phy_write(phydev, MII_BCM54XX_ECR, reg);
368 	err = phy_write(phydev, MII_BCM54XX_IMR, reg);
372 	if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||
373 	     BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&
374 	    (phydev->dev_flags & PHY_BRCM_CLEAR_RGMII_MODE))
375 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_RGMII_MODE, 0);
377 	bcm54xx_adjust_rxrefclk(phydev);
379 	switch (BRCM_PHY_MODEL(phydev)) {
382 		err = bcm54xx_config_clock_delay(phydev);
385 		err = bcm54210e_config_init(phydev);
388 		err = bcm54612e_config_init(phydev);
391 		err = bcm54616s_config_init(phydev);
395 		val = bcm_phy_read_exp(phydev,
398 		err = bcm_phy_write_exp(phydev,
406 	bcm54xx_phydsp_config(phydev);
416 	if (!phy_on_sfp(phydev)) {
419 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_LEDS1, val);
424 		bcm_phy_write_exp(phydev, BCM_EXP_MULTICOLOR, val);
427 	bcm54xx_ptp_config_init(phydev);
432 	err = bcm_phy_read_exp(phydev, BCM54XX_WOL_INT_STATUS);
437 		pm_wakeup_event(&phydev->mdio.dev, 0);
442 static int bcm54xx_iddq_set(struct phy_device *phydev, bool enable)
446 	if (!(phydev->dev_flags & PHY_BRCM_IDDQ_SUSPEND))
449 	ret = bcm_phy_read_exp(phydev, BCM54XX_TOP_MISC_IDDQ_CTRL);
458 	ret = bcm_phy_write_exp(phydev, BCM54XX_TOP_MISC_IDDQ_CTRL, ret);
463 static int bcm54xx_set_wakeup_irq(struct phy_device *phydev, bool state)
465 	struct bcm54xx_phy_priv *priv = phydev->priv;
468 	if (!bcm54xx_phy_can_wakeup(phydev))
482 static int bcm54xx_suspend(struct phy_device *phydev)
486 	bcm54xx_ptp_stop(phydev);
489 	ret = bcm_phy_read_exp(phydev, BCM54XX_WOL_INT_STATUS);
493 	if (phydev->wol_enabled)
494 		return bcm54xx_set_wakeup_irq(phydev, true);
500 	ret = phy_write(phydev, MII_BMCR, BMCR_PDOWN);
504 	return bcm54xx_iddq_set(phydev, true);
507 static int bcm54xx_resume(struct phy_device *phydev)
511 	if (phydev->wol_enabled) {
512 		ret = bcm54xx_set_wakeup_irq(phydev, false);
517 	ret = bcm54xx_iddq_set(phydev, false);
524 	ret = genphy_resume(phydev);
536 	if (phydev->dev_flags & PHY_BRCM_IDDQ_SUSPEND) {
537 		ret = genphy_soft_reset(phydev);
542 	return bcm54xx_config_init(phydev);
545 static int bcm54810_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
550 static int bcm54810_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
556 static int bcm54811_config_init(struct phy_device *phydev)
561 	reg = bcm_phy_read_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL);
563 	err = bcm_phy_write_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL,
568 	err = bcm54xx_config_init(phydev);
571 	if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) {
572 		reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0);
573 		err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0,
582 static int bcm5481_config_aneg(struct phy_device *phydev)
584 	struct device_node *np = phydev->mdio.dev.of_node;
588 	ret = genphy_config_aneg(phydev);
591 	bcm54xx_config_clock_delay(phydev);
595 		ret = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_SEL_ER + 0x9,
608 static int bcm54616s_probe(struct phy_device *phydev)
613 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
617 	phydev->priv = priv;
619 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE);
630 		val = bcm_phy_read_shadow(phydev, BCM54616S_SHD_100FX_CTRL);
642 		phydev->port = PORT_FIBRE;
648 static int bcm54616s_config_aneg(struct phy_device *phydev)
650 	struct bcm54616s_phy_priv *priv = phydev->priv;
655 		ret = genphy_c37_config_aneg(phydev);
657 		ret = genphy_config_aneg(phydev);
660 	bcm54xx_config_clock_delay(phydev);
665 static int bcm54616s_read_status(struct phy_device *phydev)
667 	struct bcm54616s_phy_priv *priv = phydev->priv;
672 		err = genphy_c37_read_status(phydev, &changed);
674 		err = genphy_read_status(phydev);
679 static int brcm_fet_config_init(struct phy_device *phydev)
684 	err = phy_write(phydev, MII_BMCR, BMCR_RESET);
704 	err = phy_read(phydev, MII_BMCR);
709 	reg = phy_read(phydev, MII_BRCM_FET_INTREG);
714 	if (phydev->phy_id == PHY_ID_BCM5221)
724 	err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);
729 	brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST);
735 	phy_lock_mdio_bus(phydev);
737 	err = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg);
739 		phy_unlock_mdio_bus(phydev);
743 	if (phydev->phy_id != PHY_ID_BCM5221) {
745 		reg = __phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4);
751 		err = __phy_modify(phydev, MII_BRCM_FET_SHDW_AUXMODE4,
758 		err = __phy_set_bits(phydev, MII_BRCM_FET_SHDW_MISCCTRL,
764 	if (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE) {
766 		err = __phy_set_bits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2,
772 	err2 = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest);
776 	phy_unlock_mdio_bus(phydev);
781 static int brcm_fet_ack_interrupt(struct phy_device *phydev)
786 	reg = phy_read(phydev, MII_BRCM_FET_INTREG);
793 static int brcm_fet_config_intr(struct phy_device *phydev)
797 	reg = phy_read(phydev, MII_BRCM_FET_INTREG);
801 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
802 		err = brcm_fet_ack_interrupt(phydev);
807 		err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);
810 		err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);
814 		err = brcm_fet_ack_interrupt(phydev);
820 static irqreturn_t brcm_fet_handle_interrupt(struct phy_device *phydev)
824 	irq_status = phy_read(phydev, MII_BRCM_FET_INTREG);
826 		phy_error(phydev);
833 	phy_trigger_machine(phydev);
838 static int brcm_fet_suspend(struct phy_device *phydev)
845 	err = phy_write(phydev, MII_BMCR, BMCR_PDOWN);
850 	brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST);
856 	phy_lock_mdio_bus(phydev);
858 	err = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg);
860 		phy_unlock_mdio_bus(phydev);
864 	if (phydev->phy_id == PHY_ID_BCM5221)
871 	err = __phy_set_bits(phydev, MII_BRCM_FET_SHDW_AUXMODE4, reg);
874 	err2 = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest);
878 	phy_unlock_mdio_bus(phydev);
883 static int bcm5221_config_aneg(struct phy_device *phydev)
887 	ret = genphy_config_aneg(phydev);
891 	switch (phydev->mdix_ctrl) {
905 	return phy_modify(phydev, BCM5221_AEGSR, BCM5221_AEGSR_MDIX_MAN_SWAP |
910 static int bcm5221_read_status(struct phy_device *phydev)
915 	ret = phy_read(phydev, BCM5221_AEGSR);
921 			phydev->mdix_ctrl = ETH_TP_MDI_X;
923 			phydev->mdix_ctrl = ETH_TP_MDI;
925 		phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
929 		phydev->mdix = ETH_TP_MDI_X;
931 		phydev->mdix = ETH_TP_MDI;
933 	return genphy_read_status(phydev);
936 static void bcm54xx_phy_get_wol(struct phy_device *phydev,
944 	if (!bcm54xx_phy_can_wakeup(phydev)) {
949 	bcm_phy_get_wol(phydev, wol);
952 static int bcm54xx_phy_set_wol(struct phy_device *phydev,
962 	if (!bcm54xx_phy_can_wakeup(phydev))
965 	ret = bcm_phy_set_wol(phydev, wol);
972 static int bcm54xx_phy_probe(struct phy_device *phydev)
978 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
984 	phydev->priv = priv;
986 	priv->stats = devm_kcalloc(&phydev->mdio.dev,
987 				   bcm_phy_get_sset_count(phydev), sizeof(u64),
992 	priv->ptp = bcm_ptp_probe(phydev);
1000 	wakeup_gpio = devm_gpiod_get(&phydev->mdio.dev, "wakeup", GPIOD_IN);
1010 		ret = devm_request_irq(&phydev->mdio.dev, priv->wake_irq,
1013 				       dev_name(&phydev->mdio.dev), phydev);
1021 	if (!bcm54xx_phy_can_wakeup(phydev))
1024 	return device_init_wakeup(&phydev->mdio.dev, true);
1027 static void bcm54xx_get_stats(struct phy_device *phydev,
1030 	struct bcm54xx_phy_priv *priv = phydev->priv;
1032 	bcm_phy_get_stats(phydev, priv->stats, stats, data);
1035 static void bcm54xx_link_change_notify(struct phy_device *phydev)
1041 	if (phydev->state != PHY_RUNNING)
1047 	if (!(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
1050 	ret = bcm_phy_read_exp(phydev, MII_BCM54XX_EXP_EXP08);
1058 	if (phydev->speed == SPEED_10)
1062 	bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP08, ret);