net/mdio/mdio-ipq4019.c

52 	void __iomem	*membase;
63 	return readl_poll_timeout(priv->membase + MDIO_CMD_REG, busy,
78 	data = readl(priv->membase + MDIO_MODE_REG);
82 	writel(data, priv->membase + MDIO_MODE_REG);
85 	writel((mii_id << 8) | mmd, priv->membase + MDIO_ADDR_REG);
88 	writel(reg, priv->membase + MDIO_DATA_WRITE_REG);
93 	writel(cmd, priv->membase + MDIO_CMD_REG);
101 	writel(cmd, priv->membase + MDIO_CMD_REG);
107 	return readl(priv->membase + MDIO_DATA_READ_REG);
119 	data = readl(priv->membase + MDIO_MODE_REG);
123 	writel(data, priv->membase + MDIO_MODE_REG);
126 	writel((mii_id << 8) | regnum, priv->membase + MDIO_ADDR_REG);
131 	writel(cmd, priv->membase + MDIO_CMD_REG);
138 	return readl(priv->membase + MDIO_DATA_READ_REG);
151 	data = readl(priv->membase + MDIO_MODE_REG);
155 	writel(data, priv->membase + MDIO_MODE_REG);
158 	writel((mii_id << 8) | mmd, priv->membase + MDIO_ADDR_REG);
161 	writel(reg, priv->membase + MDIO_DATA_WRITE_REG);
165 	writel(cmd, priv->membase + MDIO_CMD_REG);
171 	writel(value, priv->membase + MDIO_DATA_WRITE_REG);
174 	writel(cmd, priv->membase + MDIO_CMD_REG);
194 	data = readl(priv->membase + MDIO_MODE_REG);
198 	writel(data, priv->membase + MDIO_MODE_REG);
201 	writel((mii_id << 8) | regnum, priv->membase + MDIO_ADDR_REG);
204 	writel(value, priv->membase + MDIO_DATA_WRITE_REG);
209 	writel(cmd, priv->membase + MDIO_CMD_REG);
237 			val = readl(priv->membase + MDIO_MODE_REG);
240 			writel(val, priv->membase + MDIO_MODE_REG);
299 	val = readl(priv->membase + MDIO_MODE_REG);
339 	priv->membase = devm_platform_ioremap_resource(pdev, 0);
340 	if (IS_ERR(priv->membase))
341 		return PTR_ERR(priv->membase);