Lines Matching refs:bc

132 static inline void baycom_int_freq(struct baycom_state *bc)
139 bc->debug_vals.cur_intcnt++;
140 if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
141 bc->debug_vals.last_jiffies = cur_jiffies;
142 bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
143 bc->debug_vals.cur_intcnt = 0;
144 bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
145 bc->debug_vals.cur_pllcorr = 0;
181 #define SER12_ARB_DIVIDER(bc) (bc->opt_dcd ? 24 : 36)
183 #define SER12_DCD_INTERVAL(bc) (bc->opt_dcd ? 12 : 240)
185 static inline void ser12_tx(struct net_device *dev, struct baycom_state *bc)
193 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr));
194 if (bc->modem.shreg <= 1)
195 bc->modem.shreg = 0x10000 | hdlcdrv_getbits(&bc->hdrv);
196 bc->modem.ser12.tx_bit = !(bc->modem.ser12.tx_bit ^
197 (bc->modem.shreg & 1));
198 bc->modem.shreg >>= 1;
203 static inline void ser12_rx(struct net_device *dev, struct baycom_state *bc)
210 hdlcdrv_channelbit(&bc->hdrv, cur_s);
211 bc->modem.ser12.dcd_shreg = (bc->modem.ser12.dcd_shreg << 1) |
212 (cur_s != bc->modem.ser12.last_sample);
213 bc->modem.ser12.last_sample = cur_s;
214 if(bc->modem.ser12.dcd_shreg & 1) {
215 if (!bc->opt_dcd) {
219 dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
220 if (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
222 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
223 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
224 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
226 bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
228 bc->modem.ser12.dcd_sum0--;
230 if(!bc->modem.ser12.dcd_time) {
231 hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
232 bc->modem.ser12.dcd_sum1 +
233 bc->modem.ser12.dcd_sum2) < 0);
234 bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
235 bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
237 bc->modem.ser12.dcd_sum0 = 2;
238 bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
240 bc->modem.ser12.dcd_time--;
241 if (!bc->opt_dcd) {
245 if (bc->modem.ser12.interm_sample) {
254 switch (bc->modem.ser12.dcd_shreg & 7) {
258 bc->debug_vals.cur_pllcorr++;
264 bc->debug_vals.cur_pllcorr--;
271 bc->modem.shreg >>= 1;
272 if (bc->modem.ser12.last_sample ==
273 bc->modem.ser12.last_rxbit)
274 bc->modem.shreg |= 0x10000;
275 bc->modem.ser12.last_rxbit =
276 bc->modem.ser12.last_sample;
278 if (++bc->modem.ser12.interm_sample >= 3)
279 bc->modem.ser12.interm_sample = 0;
283 if (bc->modem.ser12.dcd_shreg & 1) {
287 dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
288 dcdspos += (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
290 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
291 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
292 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
294 bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
300 if (bc->modem.ser12.interm_sample) {
309 switch (bc->modem.ser12.dcd_shreg & 3) {
313 bc->debug_vals.cur_pllcorr++;
319 bc->debug_vals.cur_pllcorr--;
326 bc->modem.shreg >>= 1;
327 if (bc->modem.ser12.last_sample ==
328 bc->modem.ser12.last_rxbit)
329 bc->modem.shreg |= 0x10000;
330 bc->modem.ser12.last_rxbit =
331 bc->modem.ser12.last_sample;
333 bc->modem.ser12.interm_sample = !bc->modem.ser12.interm_sample;
337 bc->modem.ser12.dcd_sum0 -= (bc->modem.ser12.dcd_shreg & 1);
340 if (bc->modem.shreg & 1) {
341 hdlcdrv_putbits(&bc->hdrv, bc->modem.shreg >> 1);
342 bc->modem.shreg = 0x10000;
344 if(!bc->modem.ser12.dcd_time) {
345 if (bc->opt_dcd & 1)
346 hdlcdrv_setdcd(&bc->hdrv, !((inb(MSR(dev->base_addr)) ^ bc->opt_dcd) & 0x80));
348 hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
349 bc->modem.ser12.dcd_sum1 +
350 bc->modem.ser12.dcd_sum2) < 0);
351 bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
352 bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
354 bc->modem.ser12.dcd_sum0 = 2;
355 bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
357 bc->modem.ser12.dcd_time--;
365 struct baycom_state *bc = netdev_priv(dev);
368 if (!dev || !bc || bc->hdrv.magic != HDLCDRV_MAGIC)
373 baycom_int_freq(bc);
388 if (hdlcdrv_ptt(&bc->hdrv))
389 ser12_tx(dev, bc);
391 ser12_rx(dev, bc);
392 bc->modem.arb_divider--;
403 if (bc->modem.arb_divider <= 0) {
404 bc->modem.arb_divider = SER12_ARB_DIVIDER(bc);
406 hdlcdrv_arbitrate(dev, &bc->hdrv);
409 hdlcdrv_transmitter(dev, &bc->hdrv);
410 hdlcdrv_receiver(dev, &bc->hdrv);
458 struct baycom_state *bc = netdev_priv(dev);
461 if (!dev || !bc)
468 memset(&bc->modem, 0, sizeof(bc->modem));
469 bc->hdrv.par.bitrate = 1200;
491 ser12_set_divisor(dev, bc->opt_dcd ? 6 : 4);
501 struct baycom_state *bc = netdev_priv(dev);
503 if (!dev || !bc)
539 static int baycom_setmode(struct baycom_state *bc, const char *modestr)
542 bc->opt_dcd = 0;
544 bc->opt_dcd = -1;
546 bc->opt_dcd = -2;
548 bc->opt_dcd = 1;
557 struct baycom_state *bc;
563 bc = netdev_priv(dev);
564 BUG_ON(bc->hdrv.magic != HDLCDRV_MAGIC);
574 if (bc->opt_dcd <= 0)
575 strcat(hi->data.modename, (!bc->opt_dcd) ? "*" : (bc->opt_dcd == -2) ? "@" : "+");
584 return baycom_setmode(bc, hi->data.modename);
605 bi.data.dbg.debug1 = bc->hdrv.ptt_keyed;
606 bi.data.dbg.debug2 = bc->debug_vals.last_intcnt;
607 bi.data.dbg.debug3 = bc->debug_vals.last_pllcorr;
651 struct baycom_state *bc;
667 bc = netdev_priv(dev);
668 if (set_hw && baycom_setmode(bc, mode[i]))