Lines Matching refs:fp

212 static inline void fza_regs_dump(struct fza_private *fp)
214 pr_debug("%s: iomem registers:\n", fp->name);
215 pr_debug(" reset: 0x%04x\n", readw_o(&fp->regs->reset));
216 pr_debug(" interrupt event: 0x%04x\n", readw_u(&fp->regs->int_event));
217 pr_debug(" status: 0x%04x\n", readw_u(&fp->regs->status));
218 pr_debug(" interrupt mask: 0x%04x\n", readw_u(&fp->regs->int_mask));
219 pr_debug(" control A: 0x%04x\n", readw_u(&fp->regs->control_a));
220 pr_debug(" control B: 0x%04x\n", readw_u(&fp->regs->control_b));
223 static inline void fza_do_reset(struct fza_private *fp)
226 writew_o(FZA_RESET_INIT, &fp->regs->reset);
227 readw_o(&fp->regs->reset); /* Synchronize. */
228 readw_o(&fp->regs->reset); /* Read it back for a small delay. */
229 writew_o(FZA_RESET_CLR, &fp->regs->reset);
232 writew_o(fp->int_mask, &fp->regs->int_mask);
233 readw_o(&fp->regs->int_mask); /* Synchronize. */
236 static inline void fza_do_shutdown(struct fza_private *fp)
239 writew_o(FZA_CONTROL_B_IDLE, &fp->regs->control_b);
242 writew_o(FZA_RESET_INIT, &fp->regs->reset);
243 readw_o(&fp->regs->reset); /* Synchronize. */
244 writew_o(FZA_RESET_CLR, &fp->regs->reset);
245 readw_o(&fp->regs->reset); /* Synchronize. */
248 static int fza_reset(struct fza_private *fp)
254 pr_info("%s: resetting the board...\n", fp->name);
256 spin_lock_irqsave(&fp->lock, flags);
257 fp->state_chg_flag = 0;
258 fza_do_reset(fp);
259 spin_unlock_irqrestore(&fp->lock, flags);
265 t = wait_event_timeout(fp->state_chg_wait, fp->state_chg_flag,
267 status = readw_u(&fp->regs->status);
269 if (fp->state_chg_flag == 0) {
270 pr_err("%s: RESET timed out!, state %x\n", fp->name, state);
275 fp->name, state, FZA_STATUS_GET_TEST(status));
278 pr_info("%s: OK\n", fp->name);
279 pr_debug("%s: RESET: %lums elapsed\n", fp->name,
288 struct fza_private *fp = netdev_priv(dev);
289 struct fza_ring_cmd __iomem *ring = fp->ring_cmd + fp->ring_cmd_index;
295 old_mask = fp->int_mask;
297 writew_u(new_mask, &fp->regs->int_mask);
298 readw_o(&fp->regs->int_mask); /* Synchronize. */
299 fp->int_mask = new_mask;
301 buf = fp->mmio + readl_u(&ring->buffer);
305 pr_warn("%s: command buffer full, command: %u!\n", fp->name,
336 writel_u(fp->t_max, &buf->param.t_max);
337 writel_u(fp->t_req, &buf->param.t_req);
338 writel_u(fp->tvx, &buf->param.tvx);
339 writel_u(fp->lem_threshold, &buf->param.lem_threshold);
340 fza_writes(&fp->station_id, &buf->param.station_id,
343 writel_u(fp->rtoken_timeout / 12500,
345 writel_u(fp->ring_purger, &buf->param.ring_purger);
367 writew_o(FZA_CONTROL_A_CMD_POLL, &fp->regs->control_a);
369 fp->ring_cmd_index = (fp->ring_cmd_index + 1) % FZA_RING_CMD_SIZE;
371 fp->int_mask = old_mask;
372 writew_u(fp->int_mask, &fp->regs->int_mask);
380 struct fza_private *fp = netdev_priv(dev);
386 spin_lock_irqsave(&fp->lock, flags);
387 fp->cmd_done_flag = 0;
389 spin_unlock_irqrestore(&fp->lock, flags);
397 t = wait_event_timeout(fp->cmd_done_wait, fp->cmd_done_flag, 3 * HZ);
398 if (fp->cmd_done_flag == 0) {
399 pr_err("%s: INIT command timed out!, state %x\n", fp->name,
400 FZA_STATUS_GET_STATE(readw_u(&fp->regs->status)));
406 fp->name, stat,
407 FZA_STATUS_GET_STATE(readw_u(&fp->regs->status)));
410 pr_debug("%s: INIT: %lums elapsed\n", fp->name,
414 *init = fp->mmio + readl_u(&ring->buffer);
418 static void fza_rx_init(struct fza_private *fp)
424 writel_o(0, &fp->ring_hst_rx[i].rmc);
425 writel_o((fp->rx_dma[i] + 0x1000) >> 9,
426 &fp->ring_hst_rx[i].buffer1);
427 writel_o(fp->rx_dma[i] >> 9 | FZA_RING_OWN_FZA,
428 &fp->ring_hst_rx[i].buf0_own);
446 struct fza_private *fp = netdev_priv(dev);
451 if (((((fp->ring_rmc_txd_index - 1 + fp->ring_rmc_tx_size) -
452 fp->ring_rmc_tx_index) % fp->ring_rmc_tx_size) *
456 first = fp->ring_rmc_tx_index;
465 i = fp->ring_rmc_tx_index;
466 rmc_tx_ptr = &fp->buffer_tx[i];
484 writel_o(rmc, &fp->ring_rmc_tx[i].rmc);
485 writel_o(own, &fp->ring_rmc_tx[i].own);
488 fp->ring_rmc_tx_index = (fp->ring_rmc_tx_index + 1) %
489 fp->ring_rmc_tx_size;
496 if (((((fp->ring_rmc_txd_index - 1 + fp->ring_rmc_tx_size) -
497 fp->ring_rmc_tx_index) % fp->ring_rmc_tx_size) *
500 pr_debug("%s: queue stopped\n", fp->name);
503 writel_o(FZA_RING_TX_OWN_RMC, &fp->ring_rmc_tx[first].own);
506 writew_o(FZA_CONTROL_A_TX_POLL, &fp->regs->control_a);
514 struct fza_private *fp = netdev_priv(dev);
519 i = fp->ring_smt_rx_index;
520 own = readl_o(&fp->ring_smt_rx[i].own);
524 smt_rx_ptr = fp->mmio + readl_u(&fp->ring_smt_rx[i].buffer);
529 writel_o(rmc, &fp->ring_smt_rx[i].rmc);
530 writel_o(FZA_RING_OWN_FZA, &fp->ring_smt_rx[i].own);
532 fp->ring_smt_rx_index =
533 (fp->ring_smt_rx_index + 1) % fp->ring_smt_rx_size;
536 writew_o(FZA_CONTROL_A_SMT_RX_POLL, &fp->regs->control_a);
543 struct fza_private *fp = netdev_priv(dev);
548 i = fp->ring_rmc_txd_index;
549 if (i == fp->ring_rmc_tx_index)
551 own = readl_o(&fp->ring_rmc_tx[i].own);
555 rmc = readl_u(&fp->ring_rmc_tx[i].rmc);
563 fp->stats.tx_packets++;
564 fp->stats.tx_bytes += pkt_len;
566 fp->stats.tx_errors++;
571 fp->stats.tx_aborted_errors++;
574 fp->stats.tx_fifo_errors++;
583 fp->ring_rmc_txd_index = (fp->ring_rmc_txd_index + 1) %
584 fp->ring_rmc_tx_size;
587 if (((((fp->ring_rmc_txd_index - 1 + fp->ring_rmc_tx_size) -
588 fp->ring_rmc_tx_index) % fp->ring_rmc_tx_size) *
590 if (fp->queue_active) {
592 pr_debug("%s: queue woken\n", fp->name);
597 static inline int fza_rx_err(struct fza_private *fp,
605 fp->stats.rx_errors++;
613 fp->stats.rx_length_errors++;
621 writew_o(FZA_CONTROL_A_HALT, &fp->regs->control_a);
622 readw_o(&fp->regs->control_a); /* Synchronize. */
630 fp->stats.rx_crc_errors++;
633 fp->stats.rx_frame_errors++;
639 writew_o(FZA_CONTROL_A_HALT, &fp->regs->control_a);
640 readw_o(&fp->regs->control_a); /* Synchronize. */
643 fp->stats.rx_frame_errors++;
667 fp->stats.rx_errors++;
668 fp->stats.rx_length_errors++;
677 struct fza_private *fp = netdev_priv(dev);
686 i = fp->ring_hst_rx_index;
687 own = readl_o(&fp->ring_hst_rx[i].buf0_own);
691 rmc = readl_u(&fp->ring_hst_rx[i].rmc);
692 skb = fp->rx_skbuff[i];
693 dma = fp->rx_dma[i];
703 dma_sync_single_for_cpu(fp->bdev,
710 if (fza_rx_err(fp, rmc, fc))
717 newdma = dma_map_single(fp->bdev, newskb->data,
720 if (dma_mapping_error(fp->bdev, newdma)) {
730 dma_unmap_single(fp->bdev, dma, FZA_RX_BUFFER_SIZE,
744 &fp->regs->control_a);
756 fp->stats.rx_packets++;
757 fp->stats.rx_bytes += pkt_len;
759 fp->stats.multicast++;
761 fp->stats.rx_dropped++;
766 fp->rx_skbuff[i] = skb;
767 fp->rx_dma[i] = dma;
769 fp->stats.rx_dropped++;
771 fp->name);
775 writel_o(0, &fp->ring_hst_rx[i].rmc);
777 writel_o(buf, &fp->ring_hst_rx[i].buffer1);
779 writel_o(buf, &fp->ring_hst_rx[i].buf0_own);
780 fp->ring_hst_rx_index =
781 (fp->ring_hst_rx_index + 1) % fp->ring_hst_rx_size;
787 struct fza_private *fp = netdev_priv(dev);
793 i = fp->ring_smt_tx_index;
794 own = readl_o(&fp->ring_smt_tx[i].own);
798 smt_tx_ptr = fp->mmio + readl_u(&fp->ring_smt_tx[i].buffer);
799 len = readl_u(&fp->ring_smt_tx[i].rmc) & FZA_RING_PBC_MASK;
837 writel_o(FZA_RING_OWN_FZA, &fp->ring_smt_tx[i].own);
838 fp->ring_smt_tx_index =
839 (fp->ring_smt_tx_index + 1) % fp->ring_smt_tx_size;
845 struct fza_private *fp = netdev_priv(dev);
850 i = fp->ring_uns_index;
851 own = readl_o(&fp->ring_uns[i].own);
855 if (readl_u(&fp->ring_uns[i].id) == FZA_RING_UNS_RX_OVER) {
856 fp->stats.rx_errors++;
857 fp->stats.rx_over_errors++;
860 writel_o(FZA_RING_OWN_FZA, &fp->ring_uns[i].own);
861 fp->ring_uns_index =
862 (fp->ring_uns_index + 1) % FZA_RING_UNS_SIZE;
868 struct fza_private *fp = netdev_priv(dev);
873 i = fp->ring_smt_tx_index;
875 writel_o(FZA_RING_OWN_FZA, &fp->ring_smt_tx[i].own);
876 fp->ring_smt_tx_index =
877 (fp->ring_smt_tx_index + 1) % fp->ring_smt_tx_size;
879 } while (i != fp->ring_smt_tx_index);
882 i = fp->ring_rmc_tx_index;
884 own = readl_o(&fp->ring_rmc_tx[i].own);
886 u32 rmc = readl_u(&fp->ring_rmc_tx[i].rmc);
889 &fp->ring_rmc_tx[i].rmc);
891 fp->ring_rmc_tx_index =
892 (fp->ring_rmc_tx_index + 1) % fp->ring_rmc_tx_size;
894 } while (i != fp->ring_rmc_tx_index);
897 writew_o(FZA_CONTROL_A_FLUSH_DONE, &fp->regs->control_a);
903 struct fza_private *fp = netdev_priv(dev);
907 int_event = readw_o(&fp->regs->int_event) & fp->int_mask;
912 writew_u(int_event, &fp->regs->int_event);
918 fp->irq_count_cmd_done++;
920 spin_lock(&fp->lock);
921 fp->cmd_done_flag = 1;
922 wake_up(&fp->cmd_done_wait);
923 spin_unlock(&fp->lock);
928 fp->irq_count_tx_done++;
934 fp->irq_count_rx_poll++;
940 fp->irq_count_smt_tx_poll++;
946 fp->irq_count_flush_tx++;
954 fp->irq_count_link_st_chg++;
955 status = readw_u(&fp->regs->status);
958 pr_info("%s: link available\n", fp->name);
961 pr_info("%s: link unavailable\n", fp->name);
967 fp->irq_count_uns_poll++;
975 fp->irq_count_state_chg++;
977 status = readw_u(&fp->regs->status);
979 pr_debug("%s: state change: %x\n", fp->name, state);
986 del_timer_sync(&fp->reset_timer);
987 fp->ring_cmd_index = 0;
988 fp->ring_uns_index = 0;
989 fp->ring_rmc_tx_index = 0;
990 fp->ring_rmc_txd_index = 0;
991 fp->ring_hst_rx_index = 0;
992 fp->ring_smt_tx_index = 0;
993 fp->ring_smt_rx_index = 0;
994 if (fp->state > state) {
995 pr_info("%s: OK\n", fp->name);
1001 if (fp->state > state) {
1009 fp->state = state;
1010 fza_rx_init(fp);
1011 fp->queue_active = 1;
1013 pr_debug("%s: queue woken\n", fp->name);
1017 fp->queue_active = 0;
1019 pr_debug("%s: queue stopped\n", fp->name);
1020 del_timer_sync(&fp->reset_timer);
1021 pr_warn("%s: halted, reason: %x\n", fp->name,
1023 fza_regs_dump(fp);
1024 pr_info("%s: resetting the board...\n", fp->name);
1025 fza_do_reset(fp);
1026 fp->timer_state = 0;
1027 fp->reset_timer.expires = jiffies + 45 * HZ;
1028 add_timer(&fp->reset_timer);
1032 pr_warn("%s: undefined state: %x\n", fp->name, state);
1036 spin_lock(&fp->lock);
1037 fp->state_chg_flag = 1;
1038 wake_up(&fp->state_chg_wait);
1039 spin_unlock(&fp->lock);
1047 struct fza_private *fp = from_timer(fp, t, reset_timer);
1049 if (!fp->timer_state) {
1050 pr_err("%s: RESET timed out!\n", fp->name);
1051 pr_info("%s: trying harder...\n", fp->name);
1054 writew_o(FZA_RESET_INIT, &fp->regs->reset);
1055 readw_o(&fp->regs->reset); /* Synchronize. */
1057 fp->timer_state = 1;
1058 fp->reset_timer.expires = jiffies + HZ;
1061 writew_u(FZA_RESET_CLR, &fp->regs->reset);
1064 writew_o(fp->int_mask, &fp->regs->int_mask);
1065 readw_o(&fp->regs->int_mask); /* Synchronize. */
1067 fp->timer_state = 0;
1068 fp->reset_timer.expires = jiffies + 45 * HZ;
1070 add_timer(&fp->reset_timer);
1080 struct fza_private *fp = netdev_priv(dev);
1122 old_mask = fp->int_mask;
1124 writew_u(new_mask, &fp->regs->int_mask);
1125 readw_o(&fp->regs->int_mask); /* Synchronize. */
1126 fp->int_mask = new_mask;
1130 fp->int_mask = old_mask;
1131 writew_u(fp->int_mask, &fp->regs->int_mask);
1138 pr_debug("%s: queue stopped\n", fp->name);
1139 fp->stats.tx_dropped++;
1149 struct fza_private *fp = netdev_priv(dev);
1163 dma = dma_map_single(fp->bdev, skb->data,
1166 if (dma_mapping_error(fp->bdev, dma)) {
1173 dma_unmap_single(fp->bdev, fp->rx_dma[i],
1176 dev_kfree_skb(fp->rx_skbuff[i]);
1177 fp->rx_dma[i] = 0;
1178 fp->rx_skbuff[i] = NULL;
1182 fp->rx_skbuff[i] = skb;
1183 fp->rx_dma[i] = dma;
1193 spin_lock_irqsave(&fp->lock, flags);
1194 fp->cmd_done_flag = 0;
1196 spin_unlock_irqrestore(&fp->lock, flags);
1200 t = wait_event_timeout(fp->cmd_done_wait, fp->cmd_done_flag, 3 * HZ);
1201 if (fp->cmd_done_flag == 0) {
1202 pr_err("%s: PARAM command timed out!, state %x\n", fp->name,
1203 FZA_STATUS_GET_STATE(readw_u(&fp->regs->status)));
1209 fp->name, stat,
1210 FZA_STATUS_GET_STATE(readw_u(&fp->regs->status)));
1213 pr_debug("%s: PARAM: %lums elapsed\n", fp->name,
1221 struct fza_private *fp = netdev_priv(dev);
1228 pr_debug("%s: queue stopped\n", fp->name);
1230 del_timer_sync(&fp->reset_timer);
1231 spin_lock_irqsave(&fp->lock, flags);
1232 fp->state = FZA_STATE_UNINITIALIZED;
1233 fp->state_chg_flag = 0;
1235 writew_o(FZA_CONTROL_A_SHUT, &fp->regs->control_a);
1236 readw_o(&fp->regs->control_a); /* Synchronize. */
1237 spin_unlock_irqrestore(&fp->lock, flags);
1240 t = wait_event_timeout(fp->state_chg_wait, fp->state_chg_flag,
1242 state = FZA_STATUS_GET_STATE(readw_o(&fp->regs->status));
1243 if (fp->state_chg_flag == 0) {
1244 pr_err("%s: SHUT timed out!, state %x\n", fp->name, state);
1248 pr_err("%s: SHUT failed!, state %x\n", fp->name, state);
1251 pr_debug("%s: SHUT: %lums elapsed\n", fp->name,
1255 if (fp->rx_skbuff[i]) {
1256 dma_unmap_single(fp->bdev, fp->rx_dma[i],
1258 dev_kfree_skb(fp->rx_skbuff[i]);
1259 fp->rx_dma[i] = 0;
1260 fp->rx_skbuff[i] = NULL;
1268 struct fza_private *fp = netdev_priv(dev);
1270 return &fp->stats;
1289 struct fza_private *fp;
1300 dev = alloc_fddidev(sizeof(*fp));
1305 fp = netdev_priv(dev);
1308 fp->bdev = bdev;
1309 fp->name = dev_name(bdev);
1315 pr_err("%s: cannot reserve MMIO region\n", fp->name);
1323 pr_err("%s: cannot map MMIO\n", fp->name);
1338 fp->mmio = mmio;
1342 fp->name, (long long)tdev->resource.start, dev->irq);
1343 pr_debug("%s: mapped at: 0x%p\n", fp->name, mmio);
1345 fp->regs = mmio + FZA_REG_BASE;
1346 fp->ring_cmd = mmio + FZA_RING_CMD;
1347 fp->ring_uns = mmio + FZA_RING_UNS;
1349 init_waitqueue_head(&fp->state_chg_wait);
1350 init_waitqueue_head(&fp->cmd_done_wait);
1351 spin_lock_init(&fp->lock);
1352 fp->int_mask = FZA_MASK_NORMAL;
1354 timer_setup(&fp->reset_timer, fza_reset_timer, 0);
1357 fza_regs_dump(fp);
1358 fza_do_shutdown(fp);
1360 ret = request_irq(dev->irq, fza_interrupt, IRQF_SHARED, fp->name, dev);
1362 pr_err("%s: unable to get IRQ %d!\n", fp->name, dev->irq);
1367 writew_o(FZA_CONTROL_B_DRIVER, &fp->regs->control_b);
1372 fp->ring_rmc_tx_size = FZA_RING_TX_SIZE;
1374 ret = fza_reset(fp);
1395 fp->ring_rmc_tx = mmio + readl_u(&init->rmc_tx);
1396 fp->ring_rmc_tx_size = readl_u(&init->rmc_tx_size);
1397 fp->ring_hst_rx = mmio + readl_u(&init->hst_rx);
1398 fp->ring_hst_rx_size = readl_u(&init->hst_rx_size);
1399 fp->ring_smt_tx = mmio + readl_u(&init->smt_tx);
1400 fp->ring_smt_tx_size = readl_u(&init->smt_tx_size);
1401 fp->ring_smt_rx = mmio + readl_u(&init->smt_rx);
1402 fp->ring_smt_rx_size = readl_u(&init->smt_rx_size);
1404 fp->buffer_tx = mmio + FZA_TX_BUFFER_ADDR(readl_u(&init->rmc_tx));
1406 fp->t_max = readl_u(&init->def_t_max);
1407 fp->t_req = readl_u(&init->def_t_req);
1408 fp->tvx = readl_u(&init->def_tvx);
1409 fp->lem_threshold = readl_u(&init->lem_threshold);
1410 fza_reads(&init->def_station_id, &fp->station_id,
1411 sizeof(fp->station_id));
1412 fp->rtoken_timeout = readl_u(&init->rtoken_timeout);
1413 fp->ring_purger = readl_u(&init->ring_purger);
1418 pr_debug("%s: INIT parameters:\n", fp->name);
1465 fp->name,
1473 "SMT ver. %u\n", fp->name, rom_rev, fw_rev, rmc_rev, smt_ver);
1489 pr_info("%s: registered as %s\n", fp->name, dev->name);
1490 fp->name = (const char *)dev->name;
1496 del_timer_sync(&fp->reset_timer);
1497 fza_do_shutdown(fp);
1507 pr_err("%s: initialization failure, aborting!\n", fp->name);
1515 struct fza_private *fp = netdev_priv(dev);
1523 del_timer_sync(&fp->reset_timer);
1524 fza_do_shutdown(fp);
1527 iounmap(fp->mmio);