Lines Matching refs:reg_idx

1294 		j = ring->reg_idx;
1421 u8 reg_idx = ring->reg_idx;
1426 wr32m(wx, WX_PX_RR_CFG(reg_idx),
1431 10, 100, true, wx, WX_PX_RR_CFG(reg_idx));
1437 reg_idx);
1444 u8 reg_idx = ring->reg_idx;
1449 1000, 10000, true, wx, WX_PX_RR_CFG(reg_idx));
1455 reg_idx);
1462 u16 reg_idx = rx_ring->reg_idx;
1465 srrctl = rd32(wx, WX_PX_RR_CFG(reg_idx));
1475 wr32(wx, WX_PX_RR_CFG(reg_idx), srrctl);
1482 u8 reg_idx = ring->reg_idx;
1487 wr32(wx, WX_PX_TR_CFG(reg_idx), WX_PX_TR_CFG_SWFLSH);
1490 wr32(wx, WX_PX_TR_BAL(reg_idx), tdba & DMA_BIT_MASK(32));
1491 wr32(wx, WX_PX_TR_BAH(reg_idx), upper_32_bits(tdba));
1494 wr32(wx, WX_PX_TR_RP(reg_idx), 0);
1495 wr32(wx, WX_PX_TR_WP(reg_idx), 0);
1496 ring->tail = wx->hw_addr + WX_PX_TR_WP(reg_idx);
1507 wr32(wx, WX_PX_TR_CFG(reg_idx), txdctl);
1511 1000, 10000, true, wx, WX_PX_TR_CFG(reg_idx));
1513 wx_err(wx, "Could not enable Tx Queue %d\n", reg_idx);
1519 u16 reg_idx = ring->reg_idx;
1525 rxdctl = rd32(wx, WX_PX_RR_CFG(reg_idx));
1528 wr32(wx, WX_PX_RR_BAL(reg_idx), rdba & DMA_BIT_MASK(32));
1529 wr32(wx, WX_PX_RR_BAH(reg_idx), upper_32_bits(rdba));
1537 wr32(wx, WX_PX_RR_CFG(reg_idx), rxdctl);
1540 wr32(wx, WX_PX_RR_RP(reg_idx), 0);
1541 wr32(wx, WX_PX_RR_WP(reg_idx), 0);
1542 ring->tail = wx->hw_addr + WX_PX_RR_WP(reg_idx);
1555 wr32m(wx, WX_PX_RR_CFG(reg_idx),
2183 u16 reg_idx = ring->reg_idx;
2186 srrctl = rd32(wx, WX_PX_RR_CFG(reg_idx));
2189 wr32(wx, WX_PX_RR_CFG(reg_idx), srrctl);
2194 u16 reg_idx = ring->reg_idx;
2197 srrctl = rd32(wx, WX_PX_RR_CFG(reg_idx));
2200 wr32(wx, WX_PX_RR_CFG(reg_idx), srrctl);