ethernet/toshiba/ps3_gelic_net.c

94  * @descr: descriptor to look at
99 gelic_descr_get_status(struct gelic_descr *descr)
101 	return be32_to_cpu(descr->hw_regs.dmac_cmd_status) &
190  * @descr: descriptor to change
196 static void gelic_descr_set_status(struct gelic_descr *descr,
199 	descr->hw_regs.dmac_cmd_status = cpu_to_be32(status |
200 			(be32_to_cpu(descr->hw_regs.dmac_cmd_status) &
224 	struct gelic_descr *descr;
226 	for (descr = start_descr; start_descr != descr->next; descr++) {
227 		gelic_descr_set_status(descr, GELIC_DESCR_DMA_CARDOWNED);
228 		descr->hw_regs.next_descr_addr
229 			= cpu_to_be32(descr->next->link.cpu_addr);
233 	chain->tail = (descr - 1);
235 	(descr - 1)->hw_regs.next_descr_addr = 0;
273 				       card->descr + GELIC_NET_TX_DESCRIPTORS);
289 	struct gelic_descr *descr;
291 	for (descr = descr_in; descr && descr->link.cpu_addr;
292 		descr = descr->next) {
293 		dma_unmap_single(ctodev(card), descr->link.cpu_addr,
294 				 descr->link.size, DMA_BIDIRECTIONAL);
295 		descr->link.cpu_addr = 0;
296 		descr->link.size = 0;
317 	struct gelic_descr *descr;
319 	descr = start_descr;
320 	memset(descr, 0, sizeof(*descr) * no);
323 	for (i = 0; i < no; i++, descr++) {
324 		gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
326 		descr->link.size = sizeof(struct gelic_hw_regs);
327 		descr->link.cpu_addr = dma_map_single(ctodev(card), descr,
328 					  descr->link.size, DMA_BIDIRECTIONAL);
330 		if (dma_mapping_error(ctodev(card), descr->link.cpu_addr)) {
331 			for (i--, descr--; 0 <= i; i--, descr--) {
333 					descr->link.cpu_addr, descr->link.size,
339 		descr->next = descr + 1;
340 		descr->prev = descr - 1;
343 	(descr - 1)->next = start_descr;
344 	start_descr->prev = (descr - 1);
347 	descr = start_descr;
348 	for (i = 0; i < no; i++, descr++) {
349 		descr->hw_regs.next_descr_addr =
350 			cpu_to_be32(descr->next->link.cpu_addr);
357 	(descr - 1)->hw_regs.next_descr_addr = 0;
365  * @descr: descriptor to re-init
376 				  struct gelic_descr *descr)
384 	if (gelic_descr_get_status(descr) !=  GELIC_DESCR_DMA_NOT_IN_USE)
387 	descr->hw_regs.dmac_cmd_status = 0;
388 	descr->hw_regs.result_size = 0;
389 	descr->hw_regs.valid_size = 0;
390 	descr->hw_regs.data_error = 0;
391 	descr->hw_regs.payload.dev_addr = 0;
392 	descr->hw_regs.payload.size = 0;
394 	descr->skb = netdev_alloc_skb(*card->netdev, rx_skb_size);
395 	if (!descr->skb) {
396 		descr->hw_regs.payload.dev_addr = 0; /* tell DMAC don't touch memory */
400 	offset = ((unsigned long)descr->skb->data) &
403 		skb_reserve(descr->skb, GELIC_NET_RXBUF_ALIGN - offset);
405 	cpu_addr = dma_map_single(ctodev(card), descr->skb->data,
407 	descr->hw_regs.payload.dev_addr = cpu_to_be32(cpu_addr);
409 		dev_kfree_skb_any(descr->skb);
410 		descr->skb = NULL;
413 		gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
417 	descr->hw_regs.payload.size = cpu_to_be32(GELIC_NET_MAX_FRAME);
418 	descr->hw_regs.payload.dev_addr = cpu_to_be32(cpu_addr);
420 	gelic_descr_set_status(descr, GELIC_DESCR_DMA_CARDOWNED);
426  * gelic_card_release_rx_chain - free all skb of rx descr
432 	struct gelic_descr *descr = card->rx_chain.head;
435 		if (descr->skb) {
437 				be32_to_cpu(descr->hw_regs.payload.dev_addr),
438 				descr->skb->len,
440 			descr->hw_regs.payload.dev_addr = 0;
441 			descr->hw_regs.payload.size = 0;
442 			dev_kfree_skb_any(descr->skb);
443 			descr->skb = NULL;
444 			gelic_descr_set_status(descr,
447 		descr = descr->next;
448 	} while (descr != card->rx_chain.head);
461 	struct gelic_descr *descr = card->rx_chain.head;
465 		if (!descr->skb) {
466 			ret = gelic_descr_prepare_rx(card, descr);
470 		descr = descr->next;
471 	} while (descr != card->rx_chain.head);
498  * @descr: descriptor to release
503 				       struct gelic_descr *descr)
505 	struct sk_buff *skb = descr->skb;
507 	BUG_ON(!(be32_to_cpu(descr->hw_regs.data_status) & GELIC_DESCR_TX_TAIL));
510 		be32_to_cpu(descr->hw_regs.payload.dev_addr), skb->len,
514 	descr->hw_regs.payload.dev_addr = 0;
515 	descr->hw_regs.payload.size = 0;
516 	descr->hw_regs.next_descr_addr = 0;
517 	descr->hw_regs.result_size = 0;
518 	descr->hw_regs.valid_size = 0;
519 	descr->hw_regs.data_status = 0;
520 	descr->hw_regs.data_error = 0;
521 	descr->skb = NULL;
523 	/* set descr status */
524 	gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
702  * @descr: descriptor structure to fill out
709 static void gelic_descr_set_tx_cmdstat(struct gelic_descr *descr,
713 		descr->hw_regs.dmac_cmd_status =
721 				descr->hw_regs.dmac_cmd_status =
726 				descr->hw_regs.dmac_cmd_status =
733 				descr->hw_regs.dmac_cmd_status =
768  * @descr: descriptor structure
775 				  struct gelic_descr *descr,
801 	descr->hw_regs.payload.dev_addr = cpu_to_be32(buf);
802 	descr->hw_regs.payload.size = cpu_to_be32(skb->len);
803 	descr->skb = skb;
804 	descr->hw_regs.data_status = 0;
805 	descr->hw_regs.next_descr_addr = 0; /* terminate hw descr */
806 	gelic_descr_set_tx_cmdstat(descr, skb);
809 	card->tx_chain.head = descr->next;
816  * @descr: descriptor address to enable TX processing at
820 				 struct gelic_descr *descr)
827 	if (gelic_descr_get_status(descr) == GELIC_DESCR_DMA_CARDOWNED) {
830 			descr->link.cpu_addr, 0);
850 	struct gelic_descr *descr;
858 	descr = gelic_card_get_next_tx_descr(card);
859 	if (!descr) {
868 	result = gelic_descr_prepare_tx(card, descr, skb);
883 	descr->prev->hw_regs.next_descr_addr =
884 		cpu_to_be32(descr->link.cpu_addr);
890 	if (gelic_card_kick_txdma(card, descr)) {
897 		descr->hw_regs.data_status = cpu_to_be32(GELIC_DESCR_TX_TAIL);
898 		gelic_descr_release_tx(card, descr);
900 		card->tx_chain.head = descr;
902 		descr->prev->hw_regs.next_descr_addr = 0;
912  * @descr: descriptor to process
919 static void gelic_net_pass_skb_up(struct gelic_descr *descr,
924 	struct sk_buff *skb = descr->skb;
927 	data_status = be32_to_cpu(descr->hw_regs.data_status);
928 	data_error = be32_to_cpu(descr->hw_regs.data_error);
931 		be32_to_cpu(descr->hw_regs.payload.dev_addr),
932 		be32_to_cpu(descr->hw_regs.payload.size), DMA_FROM_DEVICE);
934 	skb_put(skb, be32_to_cpu(descr->hw_regs.valid_size)?
935 		be32_to_cpu(descr->hw_regs.valid_size) :
936 		be32_to_cpu(descr->hw_regs.result_size));
937 	if (!descr->hw_regs.valid_size)
939 			 be32_to_cpu(descr->hw_regs.result_size),
940 			 be32_to_cpu(descr->hw_regs.payload.size),
941 			 be32_to_cpu(descr->hw_regs.dmac_cmd_status));
943 	descr->skb = NULL;
982 	struct gelic_descr *descr = chain->head;
986 	status = gelic_descr_get_status(descr);
992 		dev_dbg(ctodev(card), "dormant descr? %p\n", descr);
1000 		vid = *(u16 *)(descr->skb->data) & VLAN_VID_MASK;
1046 	/* ok, we've got a packet in descr */
1047 	gelic_net_pass_skb_up(descr, card, netdev);
1052 		be32_to_cpu(descr->hw_regs.dmac_cmd_status) &
1059 	descr->hw_regs.next_descr_addr = 0;
1062 	gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
1068 	gelic_descr_prepare_rx(card, descr);
1070 	chain->tail = descr;
1071 	chain->head = descr->next;
1076 	descr->prev->hw_regs.next_descr_addr =
1077 		cpu_to_be32(descr->link.cpu_addr);
1542 	BUILD_BUG_ON(offsetof(struct gelic_card, descr) % 32);
1738 				       card->descr, GELIC_NET_TX_DESCRIPTORS);
1742 				       card->descr + GELIC_NET_TX_DESCRIPTORS,
1750 	dev_dbg(ctodev(card), "descr rx %p, tx %p, size %#lx, num %#x\n",