Lines Matching defs:slot
24 /* offsets from FT1 slot base i.e. slot 1 start */
55 /* offsets from FT3 slot n's base */
101 #define RX_CLASS_FT_FT1_MATCH(slot) \
102 ((BIT(slot) << RX_CLASS_FT_FT1_MATCH_SHIFT) & \
302 int slot, const u8 *addr, const u8 *mask)
307 WARN(slot >= FT1_NUM_SLOTS, "invalid slot: %d\n", slot);
309 rx_class_ft1_set_da(miig_rt, slice, slot, addr);
310 rx_class_ft1_set_da_mask(miig_rt, slice, slot, mask);
311 rx_class_ft1_cfg_set_type(miig_rt, slice, slot, FT1_CFG_TYPE_EQ);
313 /* Enable the FT1 slot in OR enable for all classifiers */
316 val |= RX_CLASS_FT_FT1_MATCH(slot);
417 int slot = 2;
438 if (slot >= FT1_NUM_SLOTS) {
447 icssg_class_ft1_add_mcast(miig_rt, slice, slot,
449 slot++;