Lines Matching defs:hw_feat
97 DMA_BIT_MASK(pdata->hw_feat.dma_width));
128 pdata->hw_feat.tx_ch_cnt);
130 pdata->hw_feat.tx_q_cnt);
140 pdata->hw_feat.rx_ch_cnt);
142 pdata->hw_feat.rx_q_cnt);
181 if (pdata->hw_feat.tso) {
187 } else if (pdata->hw_feat.tx_coe) {
192 if (pdata->hw_feat.rx_coe) {
197 if (pdata->hw_feat.rss)
203 if (pdata->hw_feat.sa_vlan_ins)
205 if (pdata->hw_feat.vlhash)
361 struct xlgmac_hw_features *hw_feat = &pdata->hw_feat;
368 memset(hw_feat, 0, sizeof(*hw_feat));
370 hw_feat->version = readl(pdata->mac_regs + MAC_VR);
373 hw_feat->phyifsel = XLGMAC_GET_REG_BITS(mac_hfr0,
376 hw_feat->vlhash = XLGMAC_GET_REG_BITS(mac_hfr0,
379 hw_feat->sma = XLGMAC_GET_REG_BITS(mac_hfr0,
382 hw_feat->rwk = XLGMAC_GET_REG_BITS(mac_hfr0,
385 hw_feat->mgk = XLGMAC_GET_REG_BITS(mac_hfr0,
388 hw_feat->mmc = XLGMAC_GET_REG_BITS(mac_hfr0,
391 hw_feat->aoe = XLGMAC_GET_REG_BITS(mac_hfr0,
394 hw_feat->ts = XLGMAC_GET_REG_BITS(mac_hfr0,
397 hw_feat->eee = XLGMAC_GET_REG_BITS(mac_hfr0,
400 hw_feat->tx_coe = XLGMAC_GET_REG_BITS(mac_hfr0,
403 hw_feat->rx_coe = XLGMAC_GET_REG_BITS(mac_hfr0,
406 hw_feat->addn_mac = XLGMAC_GET_REG_BITS(mac_hfr0,
409 hw_feat->ts_src = XLGMAC_GET_REG_BITS(mac_hfr0,
412 hw_feat->sa_vlan_ins = XLGMAC_GET_REG_BITS(mac_hfr0,
417 hw_feat->rx_fifo_size = XLGMAC_GET_REG_BITS(mac_hfr1,
420 hw_feat->tx_fifo_size = XLGMAC_GET_REG_BITS(mac_hfr1,
423 hw_feat->adv_ts_hi = XLGMAC_GET_REG_BITS(mac_hfr1,
426 hw_feat->dma_width = XLGMAC_GET_REG_BITS(mac_hfr1,
429 hw_feat->dcb = XLGMAC_GET_REG_BITS(mac_hfr1,
432 hw_feat->sph = XLGMAC_GET_REG_BITS(mac_hfr1,
435 hw_feat->tso = XLGMAC_GET_REG_BITS(mac_hfr1,
438 hw_feat->dma_debug = XLGMAC_GET_REG_BITS(mac_hfr1,
441 hw_feat->rss = XLGMAC_GET_REG_BITS(mac_hfr1,
444 hw_feat->tc_cnt = XLGMAC_GET_REG_BITS(mac_hfr1,
447 hw_feat->hash_table_size = XLGMAC_GET_REG_BITS(mac_hfr1,
450 hw_feat->l3l4_filter_num = XLGMAC_GET_REG_BITS(mac_hfr1,
455 hw_feat->rx_q_cnt = XLGMAC_GET_REG_BITS(mac_hfr2,
458 hw_feat->tx_q_cnt = XLGMAC_GET_REG_BITS(mac_hfr2,
461 hw_feat->rx_ch_cnt = XLGMAC_GET_REG_BITS(mac_hfr2,
464 hw_feat->tx_ch_cnt = XLGMAC_GET_REG_BITS(mac_hfr2,
467 hw_feat->pps_out_num = XLGMAC_GET_REG_BITS(mac_hfr2,
470 hw_feat->aux_snap_num = XLGMAC_GET_REG_BITS(mac_hfr2,
475 switch (hw_feat->hash_table_size) {
479 hw_feat->hash_table_size = 64;
482 hw_feat->hash_table_size = 128;
485 hw_feat->hash_table_size = 256;
490 switch (hw_feat->dma_width) {
492 hw_feat->dma_width = 32;
495 hw_feat->dma_width = 40;
498 hw_feat->dma_width = 48;
501 hw_feat->dma_width = 32;
507 hw_feat->rx_q_cnt++;
508 hw_feat->tx_q_cnt++;
509 hw_feat->rx_ch_cnt++;
510 hw_feat->tx_ch_cnt++;
511 hw_feat->tc_cnt++;
525 pdata->hw_feat.vlhash ? "YES" : "NO");
527 pdata->hw_feat.sma ? "YES" : "NO");
529 pdata->hw_feat.rwk ? "YES" : "NO");
531 pdata->hw_feat.mgk ? "YES" : "NO");
533 pdata->hw_feat.mmc ? "YES" : "NO");
535 pdata->hw_feat.aoe ? "YES" : "NO");
537 pdata->hw_feat.ts ? "YES" : "NO");
539 pdata->hw_feat.eee ? "YES" : "NO");
541 pdata->hw_feat.tx_coe ? "YES" : "NO");
543 pdata->hw_feat.rx_coe ? "YES" : "NO");
545 pdata->hw_feat.addn_mac ? "YES" : "NO");
547 switch (pdata->hw_feat.ts_src) {
564 pdata->hw_feat.sa_vlan_ins ? "YES" : "NO");
567 switch (pdata->hw_feat.rx_fifo_size) {
609 switch (pdata->hw_feat.tx_fifo_size) {
652 pdata->hw_feat.adv_ts_hi ? "YES" : "NO");
654 pdata->hw_feat.dma_width);
656 pdata->hw_feat.dcb ? "YES" : "NO");
658 pdata->hw_feat.sph ? "YES" : "NO");
660 pdata->hw_feat.tso ? "YES" : "NO");
662 pdata->hw_feat.dma_debug ? "YES" : "NO");
664 pdata->hw_feat.rss ? "YES" : "NO");
666 (pdata->hw_feat.tc_cnt));
668 pdata->hw_feat.hash_table_size);
670 pdata->hw_feat.l3l4_filter_num);
674 pdata->hw_feat.rx_q_cnt);
676 pdata->hw_feat.tx_q_cnt);
678 pdata->hw_feat.rx_ch_cnt);
680 pdata->hw_feat.tx_ch_cnt);
682 switch (pdata->hw_feat.pps_out_num) {
703 switch (pdata->hw_feat.aux_snap_num) {