ethernet/sunplus/spl2sw_desc.c

13 void spl2sw_rx_descs_flush(struct spl2sw_common *comm)
20 		rx_desc = comm->rx_desc[i];
21 		rx_skbinfo = comm->rx_skb_info[i];
22 		for (j = 0; j < comm->rx_desc_num[i]; j++) {
24 			rx_desc[j].cmd2 = (j == comm->rx_desc_num[i] - 1) ?
25 					  RXD_EOR | comm->rx_desc_buff_size :
26 					  comm->rx_desc_buff_size;
33 void spl2sw_tx_descs_clean(struct spl2sw_common *comm)
37 	if (!comm->tx_desc)
41 		comm->tx_desc[i].cmd1 = 0;
43 		comm->tx_desc[i].cmd2 = 0;
44 		comm->tx_desc[i].addr1 = 0;
45 		comm->tx_desc[i].addr2 = 0;
47 		if (comm->tx_temp_skb_info[i].mapping) {
48 			dma_unmap_single(&comm->pdev->dev, comm->tx_temp_skb_info[i].mapping,
49 					 comm->tx_temp_skb_info[i].skb->len, DMA_TO_DEVICE);
50 			comm->tx_temp_skb_info[i].mapping = 0;
53 		if (comm->tx_temp_skb_info[i].skb) {
54 			dev_kfree_skb_any(comm->tx_temp_skb_info[i].skb);
55 			comm->tx_temp_skb_info[i].skb = NULL;
60 void spl2sw_rx_descs_clean(struct spl2sw_common *comm)
67 		if (!comm->rx_skb_info[i])
70 		rx_desc = comm->rx_desc[i];
71 		rx_skbinfo = comm->rx_skb_info[i];
72 		for (j = 0; j < comm->rx_desc_num[i]; j++) {
79 				dma_unmap_single(&comm->pdev->dev, rx_skbinfo[j].mapping,
80 						 comm->rx_desc_buff_size, DMA_FROM_DEVICE);
88 		comm->rx_skb_info[i] = NULL;
92 void spl2sw_descs_clean(struct spl2sw_common *comm)
94 	spl2sw_rx_descs_clean(comm);
95 	spl2sw_tx_descs_clean(comm);
98 void spl2sw_descs_free(struct spl2sw_common *comm)
102 	spl2sw_descs_clean(comm);
103 	comm->tx_desc = NULL;
105 		comm->rx_desc[i] = NULL;
108 	if (comm->desc_base) {
109 		dma_free_coherent(&comm->pdev->dev, comm->desc_size, comm->desc_base,
110 				  comm->desc_dma);
111 		comm->desc_base = NULL;
112 		comm->desc_dma = 0;
113 		comm->desc_size = 0;
117 void spl2sw_tx_descs_init(struct spl2sw_common *comm)
119 	memset(comm->tx_desc, '\0', sizeof(struct spl2sw_mac_desc) *
123 int spl2sw_rx_descs_init(struct spl2sw_common *comm)
132 		comm->rx_skb_info[i] = kcalloc(comm->rx_desc_num[i], sizeof(*rx_skbinfo),
134 		if (!comm->rx_skb_info[i])
137 		rx_skbinfo = comm->rx_skb_info[i];
138 		rx_desc = comm->rx_desc[i];
139 		for (j = 0; j < comm->rx_desc_num[i]; j++) {
140 			skb = netdev_alloc_skb(NULL, comm->rx_desc_buff_size);
145 			mapping = dma_map_single(&comm->pdev->dev, skb->data,
146 						 comm->rx_desc_buff_size,
148 			if (dma_mapping_error(&comm->pdev->dev, mapping))
154 			rx_desc[j].cmd2 = (j == comm->rx_desc_num[i] - 1) ?
155 					  RXD_EOR | comm->rx_desc_buff_size :
156 					  comm->rx_desc_buff_size;
165 	spl2sw_rx_descs_clean(comm);
169 int spl2sw_descs_alloc(struct spl2sw_common *comm)
177 		desc_size += comm->rx_desc_num[i] * sizeof(struct spl2sw_mac_desc);
179 	comm->desc_base = dma_alloc_coherent(&comm->pdev->dev, desc_size, &comm->desc_dma,
181 	if (!comm->desc_base)
184 	comm->desc_size = desc_size;
187 	comm->tx_desc = comm->desc_base;
190 	comm->rx_desc[0] = &comm->tx_desc[TX_DESC_NUM + MAC_GUARD_DESC_NUM];
192 		comm->rx_desc[i] = comm->rx_desc[i - 1] + comm->rx_desc_num[i - 1];
197 int spl2sw_descs_init(struct spl2sw_common *comm)
202 	comm->rx_desc_num[0] = RX_QUEUE0_DESC_NUM;
203 	comm->rx_desc_num[1] = RX_QUEUE1_DESC_NUM;
206 		comm->rx_desc[i] = NULL;
207 		comm->rx_skb_info[i] = NULL;
208 		comm->rx_pos[i] = 0;
210 	comm->rx_desc_buff_size = MAC_RX_LEN_MAX;
213 	comm->tx_done_pos = 0;
214 	comm->tx_desc = NULL;
215 	comm->tx_pos = 0;
216 	comm->tx_desc_full = 0;
218 		comm->tx_temp_skb_info[i].skb = NULL;
221 	ret = spl2sw_descs_alloc(comm);
225 	spl2sw_tx_descs_init(comm);
227 	return spl2sw_rx_descs_init(comm);