Lines Matching refs:bp
98 static void qec_init(struct bigmac *bp)
100 struct platform_device *qec_op = bp->qec_op;
101 void __iomem *gregs = bp->gregs;
102 u8 bsizes = bp->bigmac_bursts;
165 static void bigmac_stop(struct bigmac *bp)
167 bigmac_tx_reset(bp->bregs);
168 bigmac_rx_reset(bp->bregs);
171 static void bigmac_get_counters(struct bigmac *bp, void __iomem *bregs)
173 struct net_device_stats *stats = &bp->dev->stats;
193 static void bigmac_clean_rings(struct bigmac *bp)
198 if (bp->rx_skbs[i] != NULL) {
199 dev_kfree_skb_any(bp->rx_skbs[i]);
200 bp->rx_skbs[i] = NULL;
205 if (bp->tx_skbs[i] != NULL) {
206 dev_kfree_skb_any(bp->tx_skbs[i]);
207 bp->tx_skbs[i] = NULL;
212 static void bigmac_init_rings(struct bigmac *bp, bool non_blocking)
214 struct bmac_init_block *bb = bp->bmac_block;
221 bp->rx_new = bp->rx_old = bp->tx_new = bp->tx_old = 0;
224 bigmac_clean_rings(bp);
234 bp->rx_skbs[i] = skb;
241 dma_map_single(&bp->bigmac_op->dev,
268 static void write_tcvr_bit(struct bigmac *bp, void __iomem *tregs, int bit)
270 if (bp->tcvr_type == internal) {
278 } else if (bp->tcvr_type == external) {
291 static int read_tcvr_bit(struct bigmac *bp, void __iomem *tregs)
295 if (bp->tcvr_type == internal) {
302 } else if (bp->tcvr_type == external) {
314 static int read_tcvr_bit2(struct bigmac *bp, void __iomem *tregs)
318 if (bp->tcvr_type == internal) {
324 } else if (bp->tcvr_type == external) {
336 static void put_tcvr_byte(struct bigmac *bp,
343 write_tcvr_bit(bp, tregs, ((byte >> shift) & 1));
348 static void bigmac_tcvr_write(struct bigmac *bp, void __iomem *tregs,
355 switch(bp->tcvr_type) {
366 write_tcvr_bit(bp, tregs, 0);
367 write_tcvr_bit(bp, tregs, 1);
368 write_tcvr_bit(bp, tregs, 0);
369 write_tcvr_bit(bp, tregs, 1);
371 put_tcvr_byte(bp, tregs,
372 ((bp->tcvr_type == internal) ?
375 put_tcvr_byte(bp, tregs, reg);
377 write_tcvr_bit(bp, tregs, 1);
378 write_tcvr_bit(bp, tregs, 0);
382 write_tcvr_bit(bp, tregs, (val >> shift) & 1);
387 static unsigned short bigmac_tcvr_read(struct bigmac *bp,
394 switch(bp->tcvr_type) {
405 write_tcvr_bit(bp, tregs, 0);
406 write_tcvr_bit(bp, tregs, 1);
407 write_tcvr_bit(bp, tregs, 1);
408 write_tcvr_bit(bp, tregs, 0);
410 put_tcvr_byte(bp, tregs,
411 ((bp->tcvr_type == internal) ?
414 put_tcvr_byte(bp, tregs, reg);
416 if (bp->tcvr_type == external) {
419 (void) read_tcvr_bit2(bp, tregs);
420 (void) read_tcvr_bit2(bp, tregs);
425 tmp = read_tcvr_bit2(bp, tregs);
430 (void) read_tcvr_bit2(bp, tregs);
431 (void) read_tcvr_bit2(bp, tregs);
432 (void) read_tcvr_bit2(bp, tregs);
436 (void) read_tcvr_bit(bp, tregs);
437 (void) read_tcvr_bit(bp, tregs);
442 tmp = read_tcvr_bit(bp, tregs);
447 (void) read_tcvr_bit(bp, tregs);
448 (void) read_tcvr_bit(bp, tregs);
449 (void) read_tcvr_bit(bp, tregs);
454 static void bigmac_tcvr_init(struct bigmac *bp)
456 void __iomem *tregs = bp->tregs;
473 bp->tcvr_type = external;
478 bp->tcvr_type = internal;
494 static int try_next_permutation(struct bigmac *bp, void __iomem *tregs)
496 if (bp->sw_bmcr & BMCR_SPEED100) {
500 bp->sw_bmcr = (BMCR_ISOLATE | BMCR_PDOWN | BMCR_LOOPBACK);
501 bigmac_tcvr_write(bp, tregs, MII_BMCR, bp->sw_bmcr);
502 bp->sw_bmcr = (BMCR_RESET);
503 bigmac_tcvr_write(bp, tregs, MII_BMCR, bp->sw_bmcr);
507 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, MII_BMCR);
508 if ((bp->sw_bmcr & BMCR_RESET) == 0)
513 printk(KERN_ERR "%s: PHY reset failed.\n", bp->dev->name);
515 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, MII_BMCR);
518 bp->sw_bmcr &= ~(BMCR_SPEED100);
519 bigmac_tcvr_write(bp, tregs, MII_BMCR, bp->sw_bmcr);
529 struct bigmac *bp = from_timer(bp, t, bigmac_timer);
530 void __iomem *tregs = bp->tregs;
533 bp->timer_ticks++;
534 if (bp->timer_state == ltrywait) {
535 bp->sw_bmsr = bigmac_tcvr_read(bp, tregs, MII_BMSR);
536 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, MII_BMCR);
537 if (bp->sw_bmsr & BMSR_LSTATUS) {
539 bp->dev->name,
540 (bp->sw_bmcr & BMCR_SPEED100) ?
542 bp->timer_state = asleep;
545 if (bp->timer_ticks >= 4) {
548 ret = try_next_permutation(bp, tregs);
551 bp->dev->name);
552 ret = bigmac_init_hw(bp, true);
555 "BigMAC.\n", bp->dev->name);
559 bp->timer_ticks = 0;
568 bp->dev->name);
570 bp->timer_ticks = 0;
571 bp->timer_state = asleep; /* foo on you */
575 bp->bigmac_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
576 add_timer(&bp->bigmac_timer);
583 static void bigmac_begin_auto_negotiation(struct bigmac *bp)
585 void __iomem *tregs = bp->tregs;
589 bp->sw_bmsr = bigmac_tcvr_read(bp, tregs, MII_BMSR);
590 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, MII_BMCR);
593 bp->sw_bmcr = (BMCR_ISOLATE | BMCR_PDOWN | BMCR_LOOPBACK);
594 bigmac_tcvr_write(bp, tregs, MII_BMCR, bp->sw_bmcr);
595 bp->sw_bmcr = (BMCR_RESET);
596 bigmac_tcvr_write(bp, tregs, MII_BMCR, bp->sw_bmcr);
600 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, MII_BMCR);
601 if ((bp->sw_bmcr & BMCR_RESET) == 0)
606 printk(KERN_ERR "%s: PHY reset failed.\n", bp->dev->name);
608 bp->sw_bmcr = bigmac_tcvr_read(bp, tregs, MII_BMCR);
611 bp->sw_bmcr |= BMCR_SPEED100;
612 bigmac_tcvr_write(bp, tregs, MII_BMCR, bp->sw_bmcr);
614 bp->timer_state = ltrywait;
615 bp->timer_ticks = 0;
616 bp->bigmac_timer.expires = jiffies + (12 * HZ) / 10;
617 add_timer(&bp->bigmac_timer);
620 static int bigmac_init_hw(struct bigmac *bp, bool non_blocking)
622 void __iomem *gregs = bp->gregs;
623 void __iomem *cregs = bp->creg;
624 void __iomem *bregs = bp->bregs;
625 __u32 bblk_dvma = (__u32)bp->bblock_dvma;
626 const unsigned char *e = &bp->dev->dev_addr[0];
629 bigmac_get_counters(bp, bregs);
635 qec_init(bp);
638 bigmac_init_rings(bp, non_blocking);
641 bigmac_tcvr_init(bp);
644 bigmac_stop(bp);
710 bigmac_begin_auto_negotiation(bp);
717 static void bigmac_is_medium_rare(struct bigmac *bp, u32 qec_status, u32 bmac_status)
752 bigmac_init_hw(bp, true);
756 static void bigmac_tx(struct bigmac *bp)
758 struct be_txd *txbase = &bp->bmac_block->be_txd[0];
759 struct net_device *dev = bp->dev;
762 spin_lock(&bp->lock);
764 elem = bp->tx_old;
766 while (elem != bp->tx_new) {
775 skb = bp->tx_skbs[elem];
778 dma_unmap_single(&bp->bigmac_op->dev,
783 bp->tx_skbs[elem] = NULL;
789 bp->tx_old = elem;
792 TX_BUFFS_AVAIL(bp) > 0)
793 netif_wake_queue(bp->dev);
795 spin_unlock(&bp->lock);
799 static void bigmac_rx(struct bigmac *bp)
801 struct be_rxd *rxbase = &bp->bmac_block->be_rxd[0];
803 int elem = bp->rx_new, drops = 0;
813 bp->dev->stats.rx_errors++;
814 bp->dev->stats.rx_length_errors++;
818 bp->dev->stats.rx_dropped++;
823 skb = bp->rx_skbs[elem];
833 dma_unmap_single(&bp->bigmac_op->dev,
837 bp->rx_skbs[elem] = new_skb;
841 dma_map_single(&bp->bigmac_op->dev,
851 struct sk_buff *copy_skb = netdev_alloc_skb(bp->dev, len + 2);
859 dma_sync_single_for_cpu(&bp->bigmac_op->dev,
863 dma_sync_single_for_device(&bp->bigmac_op->dev,
875 skb->protocol = eth_type_trans(skb, bp->dev);
877 bp->dev->stats.rx_packets++;
878 bp->dev->stats.rx_bytes += len;
883 bp->rx_new = elem;
885 printk(KERN_NOTICE "%s: Memory squeeze, deferring packet.\n", bp->dev->name);
890 struct bigmac *bp = (struct bigmac *) dev_id;
896 bmac_status = sbus_readl(bp->creg + CREG_STAT);
897 qec_status = sbus_readl(bp->gregs + GLOB_STAT);
902 bigmac_is_medium_rare(bp, qec_status, bmac_status);
905 bigmac_tx(bp);
908 bigmac_rx(bp);
915 struct bigmac *bp = netdev_priv(dev);
918 ret = request_irq(dev->irq, bigmac_interrupt, IRQF_SHARED, dev->name, bp);
923 timer_setup(&bp->bigmac_timer, bigmac_timer, 0);
924 ret = bigmac_init_hw(bp, false);
926 free_irq(dev->irq, bp);
932 struct bigmac *bp = netdev_priv(dev);
934 del_timer(&bp->bigmac_timer);
935 bp->timer_state = asleep;
936 bp->timer_ticks = 0;
938 bigmac_stop(bp);
939 bigmac_clean_rings(bp);
940 free_irq(dev->irq, bp);
946 struct bigmac *bp = netdev_priv(dev);
948 bigmac_init_hw(bp, true);
956 struct bigmac *bp = netdev_priv(dev);
961 mapping = dma_map_single(&bp->bigmac_op->dev, skb->data,
965 spin_lock_irq(&bp->lock);
966 entry = bp->tx_new;
968 bp->bmac_block->be_txd[entry].tx_flags = TXD_UPDATE;
969 bp->tx_skbs[entry] = skb;
970 bp->bmac_block->be_txd[entry].tx_addr = mapping;
971 bp->bmac_block->be_txd[entry].tx_flags =
973 bp->tx_new = NEXT_TX(entry);
974 if (TX_BUFFS_AVAIL(bp) <= 0)
976 spin_unlock_irq(&bp->lock);
979 sbus_writel(CREG_CTRL_TWAKEUP, bp->creg + CREG_CTRL);
987 struct bigmac *bp = netdev_priv(dev);
989 bigmac_get_counters(bp, bp->bregs);
995 struct bigmac *bp = netdev_priv(dev);
996 void __iomem *bregs = bp->bregs;
1047 struct bigmac *bp = netdev_priv(dev);
1049 spin_lock_irq(&bp->lock);
1050 bp->sw_bmsr = bigmac_tcvr_read(bp, bp->tregs, MII_BMSR);
1051 spin_unlock_irq(&bp->lock);
1053 return (bp->sw_bmsr & BMSR_LSTATUS);
1078 struct bigmac *bp;
1091 bp = netdev_priv(dev);
1092 bp->qec_op = qec_op;
1093 bp->bigmac_op = op;
1097 spin_lock_init(&bp->lock);
1100 bp->gregs = of_ioremap(&qec_op->resource[0], 0,
1102 if (!bp->gregs) {
1108 if ((sbus_readl(bp->gregs + GLOB_CTRL) & 0xf0000000) != GLOB_CTRL_BMODE) {
1114 if (qec_global_reset(bp->gregs))
1127 bp->bigmac_bursts = bsizes;
1130 qec_init(bp);
1133 bp->creg = of_ioremap(&op->resource[0], 0,
1135 if (!bp->creg) {
1141 bp->bregs = of_ioremap(&op->resource[1], 0,
1143 if (!bp->bregs) {
1151 bp->tregs = of_ioremap(&op->resource[2], 0,
1153 if (!bp->tregs) {
1159 bigmac_stop(bp);
1162 bp->bmac_block = dma_alloc_coherent(&bp->bigmac_op->dev,
1164 &bp->bblock_dvma, GFP_ATOMIC);
1165 if (bp->bmac_block == NULL || bp->bblock_dvma == 0)
1169 bp->board_rev = of_getintprop_default(bp->bigmac_op->dev.of_node,
1173 timer_setup(&bp->bigmac_timer, bigmac_timer, 0);
1174 bp->timer_state = asleep;
1175 bp->timer_ticks = 0;
1178 bp->dev = dev;
1186 dev->irq = bp->bigmac_op->archdata.irqs[0];
1194 dev_set_drvdata(&bp->bigmac_op->dev, bp);
1204 if (bp->gregs)
1205 of_iounmap(&qec_op->resource[0], bp->gregs, GLOB_REG_SIZE);
1206 if (bp->creg)
1207 of_iounmap(&op->resource[0], bp->creg, CREG_REG_SIZE);
1208 if (bp->bregs)
1209 of_iounmap(&op->resource[1], bp->bregs, BMAC_REG_SIZE);
1210 if (bp->tregs)
1211 of_iounmap(&op->resource[2], bp->tregs, TCVR_REG_SIZE);
1213 if (bp->bmac_block)
1214 dma_free_coherent(&bp->bigmac_op->dev,
1216 bp->bmac_block,
1217 bp->bblock_dvma);
1239 struct bigmac *bp = platform_get_drvdata(op);
1241 struct net_device *net_dev = bp->dev;
1248 of_iounmap(&qec_op->resource[0], bp->gregs, GLOB_REG_SIZE);
1249 of_iounmap(&op->resource[0], bp->creg, CREG_REG_SIZE);
1250 of_iounmap(&op->resource[1], bp->bregs, BMAC_REG_SIZE);
1251 of_iounmap(&op->resource[2], bp->tregs, TCVR_REG_SIZE);
1254 bp->bmac_block,
1255 bp->bblock_dvma);