stmicro/stmmac/dwxgmac2_core.c

303 	int ret = 0;
319 			ret |= CORE_IRQ_TX_PATH_IN_LPI_MODE;
323 			ret |= CORE_IRQ_TX_PATH_EXIT_LPI_MODE;
332 	return ret;
339 	int ret = 0;
347 			ret |= CORE_IRQ_MTL_RX_OVERFLOW;
352 	return ret;
587 	int i, ret;
598 		ret = dwxgmac2_rss_write_reg(ioaddr, true, i, key[i]);
599 		if (ret)
600 			return ret;
604 		ret = dwxgmac2_rss_write_reg(ioaddr, false, i, cfg->table[i]);
605 		if (ret)
606 			return ret;
961 	int ret = 0;
973 		ret |= !corr;
981 		ret |= !corr;
992 		ret |= !corr;
995 	return ret;
1048 	int ret, i;
1055 		ret = readl_poll_timeout(ioaddr + XGMAC_MTL_RXP_IACC_CTRL_ST,
1057 		if (ret)
1058 			return ret;
1077 		ret = readl_poll_timeout(ioaddr + XGMAC_MTL_RXP_IACC_CTRL_ST,
1079 		if (ret)
1080 			return ret;
1131 	int i, ret, nve = 0;
1141 	ret = dwxgmac3_rxp_disable(ioaddr);
1142 	if (ret)
1168 		ret = dwxgmac3_rxp_update_single_entry(ioaddr, entry, nve);
1169 		if (ret)
1176 			ret = dwxgmac3_rxp_update_single_entry(ioaddr, frag, nve);
1177 			if (ret)
1193 		ret = dwxgmac3_rxp_update_single_entry(ioaddr, entry, nve);
1194 		if (ret)
1211 	return ret;
1333 	int ret;
1335 	ret = dwxgmac2_filter_wait(hw);
1336 	if (ret)
1337 		return ret;
1343 	ret = dwxgmac2_filter_wait(hw);
1344 	if (ret)
1345 		return ret;
1356 	int ret;
1358 	ret = dwxgmac2_filter_wait(hw);
1359 	if (ret)
1360 		return ret;
1377 	int ret;
1383 	ret = dwxgmac2_filter_read(hw, filter_no, XGMAC_L3L4_CTRL, &value);
1384 	if (ret)
1385 		return ret;
1414 	ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L3L4_CTRL, value);
1415 	if (ret)
1416 		return ret;
1419 		ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L3_ADDR0, match);
1420 		if (ret)
1421 			return ret;
1423 		ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L3_ADDR1, match);
1424 		if (ret)
1425 			return ret;
1440 	int ret;
1446 	ret = dwxgmac2_filter_read(hw, filter_no, XGMAC_L3L4_CTRL, &value);
1447 	if (ret)
1448 		return ret;
1468 	ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L3L4_CTRL, value);
1469 	if (ret)
1470 		return ret;
1475 		ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L4_ADDR, value);
1476 		if (ret)
1477 			return ret;
1481 		ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L4_ADDR, value);
1482 		if (ret)
1483 			return ret;