stmicro/stmmac/dwmac-socfpga.c

4  * Adopted from dwmac-sti.c
66 	struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv;
67 	void __iomem *splitter_base = dwmac->splitter_base;
68 	void __iomem *sgmii_adapter_base = dwmac->sgmii_adapter_base;
69 	struct device *dev = dwmac->dev;
103 static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *dev)
134 	dwmac->f2h_ptp_ref_clk = of_property_read_bool(np, "altr,f2h_ptp_ref_clk");
145 		dwmac->splitter_base = devm_ioremap_resource(dev, &res_splitter);
146 		if (IS_ERR(dwmac->splitter_base)) {
148 			return PTR_ERR(dwmac->splitter_base);
168 			dwmac->splitter_base =
171 			if (IS_ERR(dwmac->splitter_base)) {
172 				ret = PTR_ERR(dwmac->splitter_base);
190 			dwmac->sgmii_adapter_base =
193 			if (IS_ERR(dwmac->sgmii_adapter_base)) {
194 				ret = PTR_ERR(dwmac->sgmii_adapter_base);
212 			dwmac->tse_pcs_base =
215 			if (IS_ERR(dwmac->tse_pcs_base)) {
216 				ret = PTR_ERR(dwmac->tse_pcs_base);
221 	dwmac->reg_offset = reg_offset;
222 	dwmac->reg_shift = reg_shift;
223 	dwmac->sys_mgr_base_addr = sys_mgr_base_addr;
224 	dwmac->dev = dev;
234 static int socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac)
236 	struct net_device *ndev = dev_get_drvdata(dwmac->dev);
242 static void socfpga_sgmii_config(struct socfpga_dwmac *dwmac, bool enable)
246 	writew(val, dwmac->sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
272 static int socfpga_gen5_set_phy_mode(struct socfpga_dwmac *dwmac)
274 	struct regmap *sys_mgr_base_addr = dwmac->sys_mgr_base_addr;
275 	int phymode = socfpga_get_plat_phymode(dwmac);
276 	u32 reg_offset = dwmac->reg_offset;
277 	u32 reg_shift = dwmac->reg_shift;
281 		dev_err(dwmac->dev, "bad phy mode %d\n", phymode);
289 	if (dwmac->splitter_base)
293 	reset_control_assert(dwmac->stmmac_ocp_rst);
294 	reset_control_assert(dwmac->stmmac_rst);
300 	if (dwmac->f2h_ptp_ref_clk ||
311 	if (dwmac->f2h_ptp_ref_clk)
322 	reset_control_deassert(dwmac->stmmac_ocp_rst);
323 	reset_control_deassert(dwmac->stmmac_rst);
325 		socfpga_sgmii_config(dwmac, true);
330 static int socfpga_gen10_set_phy_mode(struct socfpga_dwmac *dwmac)
332 	struct regmap *sys_mgr_base_addr = dwmac->sys_mgr_base_addr;
333 	int phymode = socfpga_get_plat_phymode(dwmac);
334 	u32 reg_offset = dwmac->reg_offset;
335 	u32 reg_shift = dwmac->reg_shift;
345 	if (dwmac->splitter_base)
349 	reset_control_assert(dwmac->stmmac_ocp_rst);
350 	reset_control_assert(dwmac->stmmac_rst);
356 	if (dwmac->f2h_ptp_ref_clk ||
375 	reset_control_deassert(dwmac->stmmac_ocp_rst);
376 	reset_control_deassert(dwmac->stmmac_rst);
378 		socfpga_sgmii_config(dwmac, true);
384 	struct socfpga_dwmac *dwmac = priv->plat->bsp_priv;
395 	if (!dwmac->tse_pcs_base)
398 	pcs_regmap = devm_regmap_init_mmio(priv->device, dwmac->tse_pcs_base,
438 	struct socfpga_dwmac	*dwmac;
457 	dwmac = devm_kzalloc(dev, sizeof(*dwmac), GFP_KERNEL);
458 	if (!dwmac)
461 	dwmac->stmmac_ocp_rst = devm_reset_control_get_optional(dev, "stmmaceth-ocp");
462 	if (IS_ERR(dwmac->stmmac_ocp_rst)) {
463 		ret = PTR_ERR(dwmac->stmmac_ocp_rst);
468 	reset_control_deassert(dwmac->stmmac_ocp_rst);
470 	ret = socfpga_dwmac_parse_data(dwmac, dev);
476 	dwmac->ops = ops;
477 	plat_dat->bsp_priv = dwmac;
493 	dwmac->stmmac_rst = stpriv->plat->stmmac_rst;
495 	ret = ops->set_phy_mode(dwmac);
580 		.name           = "socfpga-dwmac",