ethernet/sfc/ef10.c

93 	int rc;
95 	rc = efx_mcdi_rpc(efx, MC_CMD_GET_FUNCTION_INFO, NULL, 0, outbuf,
97 	if (rc)
98 		return rc;
112 	int rc;
116 	rc = efx_mcdi_rpc(efx, MC_CMD_GET_CAPABILITIES, NULL, 0,
118 	if (rc)
119 		return rc;
157 		rc = efx_mcdi_window_mode_to_stride(efx, vi_window_mode);
158 		if (rc)
159 			return rc;
189 	int rc;
193 	rc = efx_mcdi_rpc_quiet(efx, MC_CMD_LICENSING_V3, inbuf, sizeof(inbuf),
195 	if (rc || (outlen < MC_CMD_LICENSING_V3_OUT_LEN))
205 	int rc;
207 	rc = efx_mcdi_rpc(efx, MC_CMD_GET_CLOCK, NULL, 0,
209 	if (rc)
210 		return rc;
211 	rc = MCDI_DWORD(outbuf, GET_CLOCK_OUT_SYS_FREQ);
212 	return rc > 0 ? rc : -ERANGE;
220 	int rc;
225 	rc = efx_mcdi_get_workarounds(efx, &implemented, &enabled);
227 	if (rc == -ENOSYS) {
229 		rc = 0;
230 	} else if (rc == 0) {
241 			rc = efx_mcdi_set_workaround(efx,
244 			if (rc == 0)
247 			rc = 0;
258 	return rc;
293 	int rc;
295 	rc = efx_ef10_get_timer_workarounds(efx);
296 	if (rc)
297 		return rc;
299 	rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_EVQ_TMR_PROPERTIES, NULL, 0,
302 	if (rc == 0) {
304 	} else if (rc == -ENOSYS || rc == -EPERM) {
308 		rc = efx_ef10_get_sysclk_freq(efx);
309 		if (rc < 0)
310 			return rc;
312 		quantum = 1536000 / rc; /* 1536 cycles */
315 		rc = 0;
319 				       NULL, 0, rc);
322 	return rc;
329 	int rc;
333 	rc = efx_mcdi_rpc(efx, MC_CMD_GET_MAC_ADDRESSES, NULL, 0,
335 	if (rc)
336 		return rc;
350 	int num_addrs, rc;
354 	rc = efx_mcdi_rpc(efx, MC_CMD_VPORT_GET_MAC_ADDRESSES, inbuf,
357 	if (rc)
358 		return rc;
416 	int rc;
429 		rc = -EALREADY;
433 	rc = -ENOMEM;
445 		rc = efx_mcdi_filter_add_vlan(efx, vlan->vid);
448 		if (rc)
462 	return rc;
486 	int rc = 0;
501 		rc = -ENOENT;
508 	return rc;
528 	int i, rc;
538 	rc = efx_nic_alloc_buffer(efx, &nic_data->mcdi_buf,
540 	if (rc)
548 		rc = efx_ef10_get_warm_boot_count(efx);
549 		if (rc >= 0)
555 	nic_data->warm_boot_count = rc;
564 	rc = efx_mcdi_init(efx);
565 	if (rc)
574 	rc = efx_mcdi_reset(efx, RESET_TYPE_ALL);
575 	if (rc)
579 	rc = efx_mcdi_log_ctrl(efx, true, false, 0);
580 	if (rc)
583 	rc = device_create_file(&efx->pci_dev->dev,
585 	if (rc)
588 	rc = device_create_file(&efx->pci_dev->dev, &dev_attr_primary_flag);
589 	if (rc)
592 	rc = efx_get_pf_index(efx, &nic_data->pf_index);
593 	if (rc)
596 	rc = efx_ef10_init_datapath_caps(efx);
597 	if (rc < 0)
614 		rc = -EIO;
621 		rc = -EIO;
632 	rc = efx_mcdi_port_get_number(efx);
633 	if (rc < 0)
635 	efx->port_num = rc;
637 	rc = efx->type->get_mac_address(efx, efx->net_dev->perm_addr);
638 	if (rc)
641 	rc = efx_ef10_get_timer_config(efx);
642 	if (rc < 0)
645 	rc = efx_mcdi_mon_probe(efx);
646 	if (rc && rc != -EPERM)
665 	rc = efx_ef10_add_vlan(efx, EFX_FILTER_VID_UNSPEC);
666 	if (rc)
673 	rc = efx_ef10_add_vlan(efx, 0);
674 	if (rc)
710 	return rc;
720 	int rc;
727 		rc = efx_mcdi_rpc(efx, MC_CMD_FREE_PIOBUF, inbuf, sizeof(inbuf),
729 		WARN_ON(rc);
741 	int rc = 0;
746 		rc = efx_mcdi_rpc_quiet(efx, MC_CMD_ALLOC_PIOBUF, NULL, 0,
748 		if (rc) {
752 			if (!(efx_ef10_is_vf(efx) && rc == -ENOSPC))
754 						       0, outbuf, outlen, rc);
758 			rc = -EIO;
769 	if (rc)
771 	return rc;
781 	int rc;
792 		rc = efx_mcdi_rpc(efx, MC_CMD_LINK_PIOBUF,
795 		if (rc) {
799 				  rc);
834 				rc = 0;
842 				rc = efx_mcdi_rpc(efx, MC_CMD_LINK_PIOBUF,
847 			if (rc) {
853 					  tx_queue->queue, index, rc);
883 	return rc;
922 	int rc;
955 	rc = efx_mcdi_free_vis(efx);
956 	WARN_ON(rc != 0);
991 	int rc;
998 		rc = efx_mcdi_rpc(efx, MC_CMD_VADAPTOR_QUERY, inbuf, sizeof(inbuf),
1000 		if (rc)
1001 			return rc;
1004 			rc = -EIO;
1005 			return rc;
1067 	int rc;
1088 	rc = efx_ef10_probe(efx);
1089 	if (rc)
1090 		return rc;
1092 	rc = efx_ef10_get_vf_index(efx);
1093 	if (rc)
1115 	return rc;
1144 	int rc;
1171 		rc = efx_ef10_alloc_piobufs(efx, n_piobufs);
1172 		if (rc == -ENOSPC)
1175 		else if (rc == -EPERM)
1178 		else if (rc)
1180 				  "failed to allocate PIO buffers (%d)\n", rc);
1218 	rc = efx_mcdi_free_vis(efx);
1219 	if (rc != 0)
1220 		return rc;
1222 	rc = efx_ef10_alloc_vis(efx, min_vis, max_vis);
1223 	if (rc != 0)
1224 		return rc;
1283 		rc = efx_ef10_link_piobufs(efx);
1284 		if (rc)
1311 	int rc;
1314 		rc = efx_ef10_init_datapath_caps(efx);
1315 		if (rc)
1316 			return rc;
1322 		rc = efx_ef10_alloc_vis(efx, nic_data->n_allocated_vis,
1324 		if (rc)
1325 			return rc;
1335 		rc = efx_ef10_alloc_piobufs(efx, nic_data->n_piobufs);
1336 		if (rc == 0) {
1337 			rc = efx_ef10_link_piobufs(efx);
1338 			if (rc)
1346 		if (rc == -EPERM)
1349 		else if (rc)
1351 				  "failed to restore PIO buffers (%d)\n", rc);
1381 	rc = efx->type->rx_push_rss_config(efx, false,
1451 	int rc = efx_mcdi_reset(efx, reset_type);
1456 	if (reset_type == RESET_TYPE_WORLD && rc == -EPERM)
1457 		rc = 0;
1466 	     reset_type == RESET_TYPE_MCDI_TIMEOUT) && !rc)
1468 	return rc;
1904 	int rc;
1910 	rc = efx_nic_alloc_buffer(efx, &stats_buf, dma_len, GFP_KERNEL);
1911 	if (rc) {
1913 		return rc;
1925 	rc = efx_mcdi_rpc_quiet(efx, MC_CMD_MAC_STATS, inbuf, sizeof(inbuf),
1928 	if (rc) {
1930 		if (rc != -ENOENT || atomic_read(&efx->active_queues))
1932 					       sizeof(inbuf), NULL, 0, rc);
1947 		rc = -EAGAIN;
1957 	return rc;
2110 	int rc;
2112 	rc = efx_ef10_get_warm_boot_count(efx);
2113 	if (rc < 0) {
2122 	if (rc == nic_data->warm_boot_count)
2125 	nic_data->warm_boot_count = rc;
2349 	int rc;
2381 	rc = efx_mcdi_tx_init(tx_queue);
2382 	if (rc)
2501 	int rc;
2503 	rc = efx_mcdi_get_workarounds(efx, &implemented, &enabled);
2504 	if (rc == -ENOSYS) {
2511 	if (rc)
2512 		return rc;
2521 		rc = efx_mcdi_set_workaround(efx,
2524 		if (!rc) {
2537 				rc = efx_ef10_get_warm_boot_count(efx);
2538 				if (rc >= 0) {
2539 					nic_data->warm_boot_count = rc;
2540 					rc = 0;
2544 		} else if (rc == -EPERM) {
2545 			rc = 0;
2548 	return rc;
2554 	int rc = efx_ef10_probe_multicast_chaining(efx);
2557 	if (rc)
2558 		return rc;
2560 	rc = efx_mcdi_filter_table_probe(efx, nic_data->workaround_26807);
2562 	if (rc)
2566 		rc = efx_mcdi_filter_add_vlan(efx, vlan->vid);
2567 		if (rc)
2576 	return rc;
2651 				  int rc, efx_dword_t *outbuf,
3210 	int rc;
3224 	rc = efx_mcdi_rpc(efx, MC_CMD_DRIVER_EVENT, inbuf, sizeof(inbuf),
3226 	if (rc != 0)
3233 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
3245 	int rc, rc2;
3255 	rc = efx_ef10_vadaptor_free(efx, efx->vport_id);
3256 	if (rc)
3260 	rc = efx_ef10_vport_del_mac(efx, efx->vport_id,
3262 	if (rc)
3265 	rc = efx_ef10_vport_add_mac(efx, efx->vport_id,
3267 	if (!rc) {
3293 	return rc;
3300 	return rc ? rc : rc2;
3307 	int rc;
3323 		rc = efx_ef10_sriov_set_vf_mac(efx_pf, nic_data->vf_index, mac);
3324 		if (!rc)
3329 			  rc);
3343 	rc = efx_mcdi_rpc_quiet(efx, MC_CMD_VADAPTOR_SET_MAC, inbuf,
3353 	if (rc == -EPERM) {
3357 	} else if (rc == -ENOSYS && !efx_ef10_is_vf(efx)) {
3363 		rc = efx_ef10_vport_set_mac_address(efx);
3364 	} else if (rc) {
3366 				       sizeof(inbuf), NULL, 0, rc);
3369 	return rc;
3398 	int rc;
3403 	rc = efx_mcdi_rpc(efx, MC_CMD_POLL_BIST, NULL, 0,
3405 	if (rc != 0)
3406 		return rc;
3431 	int rc;
3435 	rc = efx_ef10_start_bist(efx, bist_type);
3436 	if (rc != 0)
3437 		return rc;
3445 	int rc, rc2;
3449 	rc = efx_mcdi_rpc(efx, MC_CMD_ENABLE_OFFLINE_BIST,
3451 	if (rc != 0)
3457 	rc = efx_mcdi_reset(efx, RESET_TYPE_WORLD);
3460 	if (rc == -EPERM)
3461 		rc = 0;
3462 	rc2 = efx_reset_up(efx, RESET_TYPE_WORLD, rc == 0);
3463 	return rc ? rc : rc2;
3507 	int rc;
3519 	rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
3520 	if (rc)
3521 		return rc;
3542 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_METADATA, inbuf, sizeof(inbuf),
3544 	if (rc)
3545 		return rc;
3574 	int rc;
3579 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_PARTITIONS, NULL, 0,
3581 	if (rc)
3582 		return rc;
3599 		rc = efx_ef10_mtd_probe_partition(efx, &parts[n_parts], type,
3601 		if (rc == -EEXIST || rc == -ENODEV)
3603 		if (rc)
3613 	rc = efx_mtd_add(efx, &parts[0].common, n_parts, sizeof(*parts));
3615 	if (rc)
3617 	return rc;
3634 	int rc;
3647 	rc = efx_mcdi_rpc(channel->efx, MC_CMD_PTP,
3650 	if (rc != 0)
3654 	return rc;
3661 	int rc;
3680 	rc = efx_mcdi_rpc(channel->efx, MC_CMD_PTP,
3683 	return rc;
3698 		int rc = set(channel, temp);
3699 		if (en && rc != 0) {
3701 			return rc;
3717 	int rc;
3740 		rc = efx_ptp_change_mode(efx, true, 0);
3741 		if (!rc)
3742 			rc = efx_ef10_ptp_set_ts_sync_events(efx, true, false);
3743 		if (rc)
3745 		return rc;
3795 	int rc;
3841 	rc = efx_mcdi_rpc_quiet(efx, MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS,
3843 	if (rc == -EIO) {
3852 	if (rc) {
3854 		if (rc != -EPERM)
3856 				   "Unable to set UDP tunnel ports; rc=%d.\n", rc);
3879 	return rc;
3885 	int rc = 0;
3893 		rc = efx_ef10_set_udp_tnl_ports(efx, false);
3896 	return rc;
3905 	int efx_tunnel_type, rc;
3924 	rc = efx_ef10_set_udp_tnl_ports(efx, false);
3927 	return rc;
3965 	int rc;
3976 	rc = efx_ef10_set_udp_tnl_ports(efx, false);
3979 	return rc;