Lines Matching refs:reg_offset
350 u16 offset = mdp->reg_offset[enum_index];
361 u16 offset = mdp->reg_offset[enum_index];
378 return mdp->reg_offset[enum_index];
2084 if (mdp->reg_offset[reg] != SH_ETH_OFFSET_INVALID) { \
2208 mdp->reg_offset[TSU_ADRH0] +
2727 u16 reg_offset = sh_eth_tsu_get_offset(mdp, TSU_ADRH0);
2731 for (i = 0; i < SH_ETH_TSU_CAM_ENTRIES; i++, reg_offset += 8) {
2732 sh_eth_tsu_read_entry(ndev, reg_offset, c_addr);
2754 u16 reg_offset = sh_eth_tsu_get_offset(mdp, TSU_ADRH0);
2762 ret = sh_eth_tsu_write_entry(ndev, reg_offset + entry * 8, blank);
2771 u16 reg_offset = sh_eth_tsu_get_offset(mdp, TSU_ADRH0);
2783 ret = sh_eth_tsu_write_entry(ndev, reg_offset + i * 8, addr);
2845 u16 reg_offset = sh_eth_tsu_get_offset(mdp, TSU_ADRH0);
2852 for (i = 0; i < SH_ETH_TSU_CAM_ENTRIES; i++, reg_offset += 8) {
2853 sh_eth_tsu_read_entry(ndev, reg_offset, addr);
3105 bitbang->addr = mdp->addr + mdp->reg_offset[PIR];
3151 const u16 *reg_offset = NULL;
3155 reg_offset = sh_eth_offset_gigabit;
3158 reg_offset = sh_eth_offset_fast_rcar;
3161 reg_offset = sh_eth_offset_fast_sh4;
3164 reg_offset = sh_eth_offset_fast_sh3_sh2;
3168 return reg_offset;
3310 mdp->reg_offset = sh_eth_get_register_offset(mdp->cd->register_type);
3311 if (!mdp->reg_offset) {