Lines Matching defs:phydev
18 struct phy_device *phydev);
20 static void r8168d_modify_extpage(struct phy_device *phydev, int extpage,
23 int oldpage = phy_select_page(phydev, 0x0007);
25 __phy_write(phydev, 0x1e, extpage);
26 __phy_modify(phydev, reg, mask, val);
28 phy_restore_page(phydev, oldpage, 0);
31 static void r8168d_phy_param(struct phy_device *phydev, u16 parm,
34 int oldpage = phy_select_page(phydev, 0x0005);
36 __phy_write(phydev, 0x05, parm);
37 __phy_modify(phydev, 0x06, mask, val);
39 phy_restore_page(phydev, oldpage, 0);
42 static void r8168g_phy_param(struct phy_device *phydev, u16 parm,
45 int oldpage = phy_select_page(phydev, 0x0a43);
47 __phy_write(phydev, 0x13, parm);
48 __phy_modify(phydev, 0x14, mask, val);
50 phy_restore_page(phydev, oldpage, 0);
58 static void __rtl_writephy_batch(struct phy_device *phydev,
61 phy_lock_mdio_bus(phydev);
64 __phy_write(phydev, regs->reg, regs->val);
68 phy_unlock_mdio_bus(phydev);
73 static void rtl8168f_config_eee_phy(struct phy_device *phydev)
75 r8168d_modify_extpage(phydev, 0x0020, 0x15, 0, BIT(8));
76 r8168d_phy_param(phydev, 0x8b85, 0, BIT(13));
79 static void rtl8168g_config_eee_phy(struct phy_device *phydev)
81 phy_modify_paged(phydev, 0x0a43, 0x11, 0, BIT(4));
84 static void rtl8168h_config_eee_phy(struct phy_device *phydev)
86 rtl8168g_config_eee_phy(phydev);
88 phy_modify_paged(phydev, 0xa4a, 0x11, 0x0000, 0x0200);
89 phy_modify_paged(phydev, 0xa42, 0x14, 0x0000, 0x0080);
92 static void rtl8125a_config_eee_phy(struct phy_device *phydev)
94 rtl8168h_config_eee_phy(phydev);
96 phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
97 phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
100 static void rtl8125b_config_eee_phy(struct phy_device *phydev)
102 phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
103 phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
104 phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
105 phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
109 struct phy_device *phydev)
173 rtl_writephy_batch(phydev, phy_reg_init);
177 struct phy_device *phydev)
179 phy_write_paged(phydev, 0x0002, 0x01, 0x90d0);
183 struct phy_device *phydev)
225 rtl_writephy_batch(phydev, phy_reg_init);
229 struct phy_device *phydev)
279 rtl_writephy_batch(phydev, phy_reg_init);
283 struct phy_device *phydev)
285 phy_write(phydev, 0x1f, 0x0001);
286 phy_set_bits(phydev, 0x16, BIT(0));
287 phy_write(phydev, 0x10, 0xf41b);
288 phy_write(phydev, 0x1f, 0x0000);
292 struct phy_device *phydev)
294 phy_write_paged(phydev, 0x0001, 0x10, 0xf41b);
298 struct phy_device *phydev)
300 phy_write(phydev, 0x1d, 0x0f00);
301 phy_write_paged(phydev, 0x0002, 0x0c, 0x1ec8);
305 struct phy_device *phydev)
307 phy_set_bits(phydev, 0x14, BIT(5));
308 phy_set_bits(phydev, 0x0d, BIT(5));
309 phy_write_paged(phydev, 0x0001, 0x1d, 0x3d98);
313 struct phy_device *phydev)
335 rtl_writephy_batch(phydev, phy_reg_init);
337 phy_set_bits(phydev, 0x14, BIT(5));
338 phy_set_bits(phydev, 0x0d, BIT(5));
342 struct phy_device *phydev)
362 rtl_writephy_batch(phydev, phy_reg_init);
364 phy_set_bits(phydev, 0x16, BIT(0));
365 phy_set_bits(phydev, 0x14, BIT(5));
366 phy_set_bits(phydev, 0x0d, BIT(5));
370 struct phy_device *phydev)
384 rtl_writephy_batch(phydev, phy_reg_init);
386 phy_set_bits(phydev, 0x16, BIT(0));
387 phy_set_bits(phydev, 0x14, BIT(5));
388 phy_set_bits(phydev, 0x0d, BIT(5));
433 struct phy_device *phydev,
438 phy_write(phydev, 0x1f, 0x0005);
439 phy_write(phydev, 0x05, 0x001b);
440 reg_val = phy_read(phydev, 0x06);
441 phy_write(phydev, 0x1f, 0x0000);
444 phydev_warn(phydev, "chipset not ready for firmware\n");
449 static void rtl8168d_1_common(struct phy_device *phydev)
453 phy_write_paged(phydev, 0x0002, 0x05, 0x669a);
454 r8168d_phy_param(phydev, 0x8330, 0xffff, 0x669a);
455 phy_write(phydev, 0x1f, 0x0002);
457 val = phy_read(phydev, 0x0d);
468 phy_write(phydev, 0x0d, val | set[i]);
473 struct phy_device *phydev)
475 rtl_writephy_batch(phydev, rtl8168d_1_phy_reg_init_0);
481 phy_write(phydev, 0x1f, 0x0002);
482 phy_modify(phydev, 0x0b, 0x00ef, 0x0010);
483 phy_modify(phydev, 0x0c, 0x5d00, 0xa200);
486 rtl8168d_1_common(phydev);
488 phy_write_paged(phydev, 0x0002, 0x05, 0x6662);
489 r8168d_phy_param(phydev, 0x8330, 0xffff, 0x6662);
493 phy_write(phydev, 0x1f, 0x0002);
494 phy_set_bits(phydev, 0x0d, 0x0300);
495 phy_set_bits(phydev, 0x0f, 0x0010);
498 phy_write(phydev, 0x1f, 0x0002);
499 phy_modify(phydev, 0x02, 0x0600, 0x0100);
500 phy_clear_bits(phydev, 0x03, 0xe000);
501 phy_write(phydev, 0x1f, 0x0000);
503 rtl8168d_apply_firmware_cond(tp, phydev, 0xbf00);
507 struct phy_device *phydev)
509 rtl_writephy_batch(phydev, rtl8168d_1_phy_reg_init_0);
512 rtl8168d_1_common(phydev);
514 phy_write_paged(phydev, 0x0002, 0x05, 0x2642);
515 r8168d_phy_param(phydev, 0x8330, 0xffff, 0x2642);
519 phy_write(phydev, 0x1f, 0x0002);
520 phy_modify(phydev, 0x02, 0x0600, 0x0100);
521 phy_clear_bits(phydev, 0x03, 0xe000);
522 phy_write(phydev, 0x1f, 0x0000);
525 phy_modify_paged(phydev, 0x0002, 0x0f, 0x0000, 0x0017);
527 rtl8168d_apply_firmware_cond(tp, phydev, 0xb300);
531 struct phy_device *phydev)
533 phy_write_paged(phydev, 0x0001, 0x17, 0x0cc0);
534 r8168d_modify_extpage(phydev, 0x002d, 0x18, 0xffff, 0x0040);
535 phy_set_bits(phydev, 0x0d, BIT(5));
539 struct phy_device *phydev)
555 r8168d_phy_param(phydev, 0x8b80, 0xffff, 0xc896);
557 rtl_writephy_batch(phydev, phy_reg_init);
560 r8168d_modify_extpage(phydev, 0x002f, 0x15, 0xffff, 0x1919);
562 r8168d_modify_extpage(phydev, 0x00ac, 0x18, 0xffff, 0x0006);
565 r8168d_modify_extpage(phydev, 0x0023, 0x17, 0x0000, 0x0006);
568 phy_modify_paged(phydev, 0x0002, 0x08, 0x7f00, 0x8000);
571 r8168d_modify_extpage(phydev, 0x002d, 0x18, 0x0000, 0x0050);
572 phy_set_bits(phydev, 0x14, BIT(15));
574 r8168d_phy_param(phydev, 0x8b86, 0x0000, 0x0001);
575 r8168d_phy_param(phydev, 0x8b85, 0x2000, 0x0000);
577 r8168d_modify_extpage(phydev, 0x0020, 0x15, 0x1100, 0x0000);
578 phy_write_paged(phydev, 0x0006, 0x00, 0x5a00);
580 phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0x0000);
584 struct phy_device *phydev)
589 r8168d_modify_extpage(phydev, 0x00ac, 0x18, 0xffff, 0x0006);
592 phy_write_paged(phydev, 0x0003, 0x09, 0xa20f);
595 r8168d_phy_param(phydev, 0x8b5b, 0xffff, 0x9222);
596 r8168d_phy_param(phydev, 0x8b6d, 0xffff, 0x8000);
597 r8168d_phy_param(phydev, 0x8b76, 0xffff, 0x8000);
600 phy_write(phydev, 0x1f, 0x0005);
601 phy_write(phydev, 0x05, 0x8b80);
602 phy_set_bits(phydev, 0x17, 0x0006);
603 phy_write(phydev, 0x1f, 0x0000);
606 r8168d_modify_extpage(phydev, 0x002d, 0x18, 0x0000, 0x0010);
607 phy_set_bits(phydev, 0x14, BIT(15));
610 r8168d_phy_param(phydev, 0x8b86, 0x0000, 0x0001);
613 r8168d_phy_param(phydev, 0x8b85, 0x0000, 0x4000);
615 rtl8168f_config_eee_phy(phydev);
618 phy_write(phydev, 0x1f, 0x0003);
619 phy_set_bits(phydev, 0x19, BIT(0));
620 phy_set_bits(phydev, 0x10, BIT(10));
621 phy_write(phydev, 0x1f, 0x0000);
622 phy_modify_paged(phydev, 0x0005, 0x01, 0, BIT(8));
626 struct phy_device *phydev)
629 r8168d_phy_param(phydev, 0x8b80, 0x0000, 0x0006);
632 r8168d_modify_extpage(phydev, 0x002d, 0x18, 0x0000, 0x0010);
633 phy_set_bits(phydev, 0x14, BIT(15));
636 r8168d_phy_param(phydev, 0x8b86, 0x0000, 0x0001);
638 rtl8168f_config_eee_phy(phydev);
642 struct phy_device *phydev)
647 phy_write_paged(phydev, 0x0003, 0x09, 0xa20f);
650 r8168d_phy_param(phydev, 0x8b55, 0xffff, 0x0000);
651 r8168d_phy_param(phydev, 0x8b5e, 0xffff, 0x0000);
652 r8168d_phy_param(phydev, 0x8b67, 0xffff, 0x0000);
653 r8168d_phy_param(phydev, 0x8b70, 0xffff, 0x0000);
654 r8168d_modify_extpage(phydev, 0x0078, 0x17, 0xffff, 0x0000);
655 r8168d_modify_extpage(phydev, 0x0078, 0x19, 0xffff, 0x00fb);
658 r8168d_phy_param(phydev, 0x8b79, 0xffff, 0xaa00);
661 phy_write_paged(phydev, 0x0003, 0x01, 0x328a);
663 rtl8168f_hw_phy_config(tp, phydev);
666 r8168d_phy_param(phydev, 0x8b85, 0x0000, 0x4000);
670 struct phy_device *phydev)
674 rtl8168f_hw_phy_config(tp, phydev);
678 struct phy_device *phydev)
682 rtl8168f_hw_phy_config(tp, phydev);
685 r8168d_phy_param(phydev, 0x8b85, 0x0000, 0x4000);
688 phy_write_paged(phydev, 0x0003, 0x09, 0xa20f);
691 r8168d_phy_param(phydev, 0x8b55, 0xffff, 0x0000);
692 r8168d_phy_param(phydev, 0x8b5e, 0xffff, 0x0000);
693 r8168d_phy_param(phydev, 0x8b67, 0xffff, 0x0000);
694 r8168d_phy_param(phydev, 0x8b70, 0xffff, 0x0000);
695 r8168d_modify_extpage(phydev, 0x0078, 0x17, 0xffff, 0x0000);
696 r8168d_modify_extpage(phydev, 0x0078, 0x19, 0xffff, 0x00aa);
699 r8168d_phy_param(phydev, 0x8b79, 0xffff, 0xaa00);
702 phy_write_paged(phydev, 0x0003, 0x01, 0x328a);
705 r8168d_phy_param(phydev, 0x8b54, 0x0800, 0x0000);
706 r8168d_phy_param(phydev, 0x8b5d, 0x0800, 0x0000);
707 r8168d_phy_param(phydev, 0x8a7c, 0x0100, 0x0000);
708 r8168d_phy_param(phydev, 0x8a7f, 0x0000, 0x0100);
709 r8168d_phy_param(phydev, 0x8a82, 0x0100, 0x0000);
710 r8168d_phy_param(phydev, 0x8a85, 0x0100, 0x0000);
711 r8168d_phy_param(phydev, 0x8a88, 0x0100, 0x0000);
714 r8168d_phy_param(phydev, 0x8b85, 0x0000, 0x8000);
717 phy_write(phydev, 0x1f, 0x0003);
718 phy_clear_bits(phydev, 0x19, BIT(0));
719 phy_clear_bits(phydev, 0x10, BIT(10));
720 phy_write(phydev, 0x1f, 0x0000);
723 static void rtl8168g_disable_aldps(struct phy_device *phydev)
725 phy_modify_paged(phydev, 0x0a43, 0x10, BIT(2), 0);
728 static void rtl8168g_enable_gphy_10m(struct phy_device *phydev)
730 phy_modify_paged(phydev, 0x0a44, 0x11, 0, BIT(11));
733 static void rtl8168g_phy_adjust_10m_aldps(struct phy_device *phydev)
735 phy_modify_paged(phydev, 0x0bcc, 0x14, BIT(8), 0);
736 phy_modify_paged(phydev, 0x0a44, 0x11, 0, BIT(7) | BIT(6));
737 r8168g_phy_param(phydev, 0x8084, 0x6000, 0x0000);
738 phy_modify_paged(phydev, 0x0a43, 0x10, 0x0000, 0x1003);
742 struct phy_device *phydev)
748 ret = phy_read_paged(phydev, 0x0a46, 0x10);
750 phy_modify_paged(phydev, 0x0bcc, 0x12, BIT(15), 0);
752 phy_modify_paged(phydev, 0x0bcc, 0x12, 0, BIT(15));
754 ret = phy_read_paged(phydev, 0x0a46, 0x13);
756 phy_modify_paged(phydev, 0x0c41, 0x15, 0, BIT(1));
758 phy_modify_paged(phydev, 0x0c41, 0x15, BIT(1), 0);
761 phy_modify_paged(phydev, 0x0a44, 0x11, 0, BIT(3) | BIT(2));
763 rtl8168g_phy_adjust_10m_aldps(phydev);
766 phy_modify_paged(phydev, 0x0a4b, 0x11, 0, BIT(2));
769 r8168g_phy_param(phydev, 0x8012, 0x0000, 0x8000);
771 phy_modify_paged(phydev, 0x0c42, 0x11, BIT(13), BIT(14));
774 phy_write(phydev, 0x1f, 0x0bcd);
775 phy_write(phydev, 0x14, 0x5065);
776 phy_write(phydev, 0x14, 0xd065);
777 phy_write(phydev, 0x1f, 0x0bc8);
778 phy_write(phydev, 0x11, 0x5655);
779 phy_write(phydev, 0x1f, 0x0bcd);
780 phy_write(phydev, 0x14, 0x1065);
781 phy_write(phydev, 0x14, 0x9065);
782 phy_write(phydev, 0x14, 0x1065);
783 phy_write(phydev, 0x1f, 0x0000);
785 rtl8168g_disable_aldps(phydev);
786 rtl8168g_config_eee_phy(phydev);
790 struct phy_device *phydev)
793 rtl8168g_config_eee_phy(phydev);
797 struct phy_device *phydev)
805 r8168g_phy_param(phydev, 0x808a, 0x003f, 0x000a);
808 r8168g_phy_param(phydev, 0x0811, 0x0000, 0x0800);
809 phy_modify_paged(phydev, 0x0a42, 0x16, 0x0000, 0x0002);
811 rtl8168g_enable_gphy_10m(phydev);
815 phy_write_paged(phydev, 0x0bcf, 0x16, ioffset);
818 data = phy_read_paged(phydev, 0x0bcd, 0x16);
824 phy_write_paged(phydev, 0x0bcd, 0x17, data);
827 phy_modify_paged(phydev, 0x0a44, 0x11, BIT(7), 0);
830 phy_modify_paged(phydev, 0x0a43, 0x10, BIT(0), 0);
832 rtl8168g_disable_aldps(phydev);
833 rtl8168g_config_eee_phy(phydev);
837 struct phy_device *phydev)
839 rtl8168g_phy_adjust_10m_aldps(phydev);
842 r8168g_phy_param(phydev, 0x8012, 0x0000, 0x8000);
845 phy_modify_paged(phydev, 0x0c42, 0x11, BIT(13), BIT(14));
848 r8168g_phy_param(phydev, 0x80f3, 0xff00, 0x8b00);
849 r8168g_phy_param(phydev, 0x80f0, 0xff00, 0x3a00);
850 r8168g_phy_param(phydev, 0x80ef, 0xff00, 0x0500);
851 r8168g_phy_param(phydev, 0x80f6, 0xff00, 0x6e00);
852 r8168g_phy_param(phydev, 0x80ec, 0xff00, 0x6800);
853 r8168g_phy_param(phydev, 0x80ed, 0xff00, 0x7c00);
854 r8168g_phy_param(phydev, 0x80f2, 0xff00, 0xf400);
855 r8168g_phy_param(phydev, 0x80f4, 0xff00, 0x8500);
856 r8168g_phy_param(phydev, 0x8110, 0xff00, 0xa800);
857 r8168g_phy_param(phydev, 0x810f, 0xff00, 0x1d00);
858 r8168g_phy_param(phydev, 0x8111, 0xff00, 0xf500);
859 r8168g_phy_param(phydev, 0x8113, 0xff00, 0x6100);
860 r8168g_phy_param(phydev, 0x8115, 0xff00, 0x9200);
861 r8168g_phy_param(phydev, 0x810e, 0xff00, 0x0400);
862 r8168g_phy_param(phydev, 0x810c, 0xff00, 0x7c00);
863 r8168g_phy_param(phydev, 0x810b, 0xff00, 0x5a00);
864 r8168g_phy_param(phydev, 0x80d1, 0xff00, 0xff00);
865 r8168g_phy_param(phydev, 0x80cd, 0xff00, 0x9e00);
866 r8168g_phy_param(phydev, 0x80d3, 0xff00, 0x0e00);
867 r8168g_phy_param(phydev, 0x80d5, 0xff00, 0xca00);
868 r8168g_phy_param(phydev, 0x80d7, 0xff00, 0x8400);
871 phy_write(phydev, 0x1f, 0x0bcd);
872 phy_write(phydev, 0x14, 0x5065);
873 phy_write(phydev, 0x14, 0xd065);
874 phy_write(phydev, 0x1f, 0x0bc8);
875 phy_write(phydev, 0x12, 0x00ed);
876 phy_write(phydev, 0x1f, 0x0bcd);
877 phy_write(phydev, 0x14, 0x1065);
878 phy_write(phydev, 0x14, 0x9065);
879 phy_write(phydev, 0x14, 0x1065);
880 phy_write(phydev, 0x1f, 0x0000);
882 rtl8168g_disable_aldps(phydev);
883 rtl8168g_config_eee_phy(phydev);
887 struct phy_device *phydev)
890 r8168g_phy_param(phydev, 0x808e, 0xff00, 0x4800);
891 r8168g_phy_param(phydev, 0x8090, 0xff00, 0xcc00);
892 r8168g_phy_param(phydev, 0x8092, 0xff00, 0xb000);
894 r8168g_phy_param(phydev, 0x8088, 0xff00, 0x6000);
895 r8168g_phy_param(phydev, 0x808b, 0x3f00, 0x0b00);
896 r8168g_phy_param(phydev, 0x808d, 0x1f00, 0x0600);
897 r8168g_phy_param(phydev, 0x808c, 0xff00, 0xb000);
898 r8168g_phy_param(phydev, 0x80a0, 0xff00, 0x2800);
899 r8168g_phy_param(phydev, 0x80a2, 0xff00, 0x5000);
900 r8168g_phy_param(phydev, 0x809b, 0xf800, 0xb000);
901 r8168g_phy_param(phydev, 0x809a, 0xff00, 0x4b00);
902 r8168g_phy_param(phydev, 0x809d, 0x3f00, 0x0800);
903 r8168g_phy_param(phydev, 0x80a1, 0xff00, 0x7000);
904 r8168g_phy_param(phydev, 0x809f, 0x1f00, 0x0300);
905 r8168g_phy_param(phydev, 0x809e, 0xff00, 0x8800);
906 r8168g_phy_param(phydev, 0x80b2, 0xff00, 0x2200);
907 r8168g_phy_param(phydev, 0x80ad, 0xf800, 0x9800);
908 r8168g_phy_param(phydev, 0x80af, 0x3f00, 0x0800);
909 r8168g_phy_param(phydev, 0x80b3, 0xff00, 0x6f00);
910 r8168g_phy_param(phydev, 0x80b1, 0x1f00, 0x0300);
911 r8168g_phy_param(phydev, 0x80b0, 0xff00, 0x9300);
913 r8168g_phy_param(phydev, 0x8011, 0x0000, 0x0800);
915 rtl8168g_enable_gphy_10m(phydev);
917 r8168g_phy_param(phydev, 0x8016, 0x0000, 0x0400);
919 rtl8168g_disable_aldps(phydev);
920 rtl8168h_config_eee_phy(phydev);
924 struct phy_device *phydev)
933 phy_set_bits(phydev, 0x11, BIT(12));
934 phy_set_bits(phydev, 0x19, BIT(13));
935 phy_set_bits(phydev, 0x10, BIT(15));
937 rtl_writephy_batch(phydev, phy_reg_init);
941 struct phy_device *phydev)
943 phy_set_bits(phydev, 0x11, BIT(12));
944 phy_modify_paged(phydev, 0x0002, 0x0f, 0x0000, 0x0003);
948 struct phy_device *phydev)
951 phy_write(phydev, 0x18, 0x0310);
956 phy_write_paged(phydev, 0x0005, 0x1a, 0x0000);
957 phy_write_paged(phydev, 0x0004, 0x1c, 0x0000);
958 phy_write_paged(phydev, 0x0001, 0x15, 0x7701);
962 struct phy_device *phydev)
965 phy_write(phydev, 0x18, 0x0310);
971 phy_write(phydev, 0x1f, 0x0004);
972 phy_write(phydev, 0x10, 0x401f);
973 phy_write(phydev, 0x19, 0x7030);
974 phy_write(phydev, 0x1f, 0x0000);
978 struct phy_device *phydev)
988 phy_write(phydev, 0x18, 0x0310);
993 rtl_writephy_batch(phydev, phy_reg_init);
996 static void rtl8125_legacy_force_mode(struct phy_device *phydev)
998 phy_modify_paged(phydev, 0xa5b, 0x12, BIT(15), 0);
1002 struct phy_device *phydev)
1006 phy_modify_paged(phydev, 0xad4, 0x17, 0x0000, 0x0010);
1007 phy_modify_paged(phydev, 0xad1, 0x13, 0x03ff, 0x03ff);
1008 phy_modify_paged(phydev, 0xad3, 0x11, 0x003f, 0x0006);
1009 phy_modify_paged(phydev, 0xac0, 0x14, 0x1100, 0x0000);
1010 phy_modify_paged(phydev, 0xacc, 0x10, 0x0003, 0x0002);
1011 phy_modify_paged(phydev, 0xad4, 0x10, 0x00e7, 0x0044);
1012 phy_modify_paged(phydev, 0xac1, 0x12, 0x0080, 0x0000);
1013 phy_modify_paged(phydev, 0xac8, 0x10, 0x0300, 0x0000);
1014 phy_modify_paged(phydev, 0xac5, 0x17, 0x0007, 0x0002);
1015 phy_write_paged(phydev, 0xad4, 0x16, 0x00a8);
1016 phy_write_paged(phydev, 0xac5, 0x16, 0x01ff);
1017 phy_modify_paged(phydev, 0xac8, 0x15, 0x00f0, 0x0030);
1019 phy_write(phydev, 0x1f, 0x0b87);
1020 phy_write(phydev, 0x16, 0x80a2);
1021 phy_write(phydev, 0x17, 0x0153);
1022 phy_write(phydev, 0x16, 0x809c);
1023 phy_write(phydev, 0x17, 0x0153);
1024 phy_write(phydev, 0x1f, 0x0000);
1026 phy_write(phydev, 0x1f, 0x0a43);
1027 phy_write(phydev, 0x13, 0x81B3);
1028 phy_write(phydev, 0x14, 0x0043);
1029 phy_write(phydev, 0x14, 0x00A7);
1030 phy_write(phydev, 0x14, 0x00D6);
1031 phy_write(phydev, 0x14, 0x00EC);
1032 phy_write(phydev, 0x14, 0x00F6);
1033 phy_write(phydev, 0x14, 0x00FB);
1034 phy_write(phydev, 0x14, 0x00FD);
1035 phy_write(phydev, 0x14, 0x00FF);
1036 phy_write(phydev, 0x14, 0x00BB);
1037 phy_write(phydev, 0x14, 0x0058);
1038 phy_write(phydev, 0x14, 0x0029);
1039 phy_write(phydev, 0x14, 0x0013);
1040 phy_write(phydev, 0x14, 0x0009);
1041 phy_write(phydev, 0x14, 0x0004);
1042 phy_write(phydev, 0x14, 0x0002);
1044 phy_write(phydev, 0x14, 0x0000);
1045 phy_write(phydev, 0x1f, 0x0000);
1047 r8168g_phy_param(phydev, 0x8257, 0xffff, 0x020F);
1048 r8168g_phy_param(phydev, 0x80ea, 0xffff, 0x7843);
1052 phy_modify_paged(phydev, 0xd06, 0x14, 0x0000, 0x2000);
1054 r8168g_phy_param(phydev, 0x81a2, 0x0000, 0x0100);
1056 phy_modify_paged(phydev, 0xb54, 0x16, 0xff00, 0xdb00);
1057 phy_modify_paged(phydev, 0xa45, 0x12, 0x0001, 0x0000);
1058 phy_modify_paged(phydev, 0xa5d, 0x12, 0x0000, 0x0020);
1059 phy_modify_paged(phydev, 0xad4, 0x17, 0x0010, 0x0000);
1060 phy_modify_paged(phydev, 0xa86, 0x15, 0x0001, 0x0000);
1061 rtl8168g_enable_gphy_10m(phydev);
1063 rtl8125a_config_eee_phy(phydev);
1067 struct phy_device *phydev)
1071 phy_modify_paged(phydev, 0xa44, 0x11, 0x0000, 0x0800);
1072 phy_modify_paged(phydev, 0xac4, 0x13, 0x00f0, 0x0090);
1073 phy_modify_paged(phydev, 0xad3, 0x10, 0x0003, 0x0001);
1075 phy_write(phydev, 0x1f, 0x0b87);
1076 phy_write(phydev, 0x16, 0x80f5);
1077 phy_write(phydev, 0x17, 0x760e);
1078 phy_write(phydev, 0x16, 0x8107);
1079 phy_write(phydev, 0x17, 0x360e);
1080 phy_write(phydev, 0x16, 0x8551);
1081 phy_modify(phydev, 0x17, 0xff00, 0x0800);
1082 phy_write(phydev, 0x1f, 0x0000);
1084 phy_modify_paged(phydev, 0xbf0, 0x10, 0xe000, 0xa000);
1085 phy_modify_paged(phydev, 0xbf4, 0x13, 0x0f00, 0x0300);
1087 r8168g_phy_param(phydev, 0x8044, 0xffff, 0x2417);
1088 r8168g_phy_param(phydev, 0x804a, 0xffff, 0x2417);
1089 r8168g_phy_param(phydev, 0x8050, 0xffff, 0x2417);
1090 r8168g_phy_param(phydev, 0x8056, 0xffff, 0x2417);
1091 r8168g_phy_param(phydev, 0x805c, 0xffff, 0x2417);
1092 r8168g_phy_param(phydev, 0x8062, 0xffff, 0x2417);
1093 r8168g_phy_param(phydev, 0x8068, 0xffff, 0x2417);
1094 r8168g_phy_param(phydev, 0x806e, 0xffff, 0x2417);
1095 r8168g_phy_param(phydev, 0x8074, 0xffff, 0x2417);
1096 r8168g_phy_param(phydev, 0x807a, 0xffff, 0x2417);
1098 phy_modify_paged(phydev, 0xa4c, 0x15, 0x0000, 0x0040);
1099 phy_modify_paged(phydev, 0xbf8, 0x12, 0xe000, 0xa000);
1101 rtl8125_legacy_force_mode(phydev);
1102 rtl8125b_config_eee_phy(phydev);
1106 struct phy_device *phydev)
1111 void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
1165 phy_configs[ver](tp, phydev);