Lines Matching defs:edev
73 #define QEDE_ARFS_BUCKET_HEAD(edev, idx) (&(edev)->arfs->arfs_hl_head[idx])
88 static void qede_configure_arfs_fltr(struct qede_dev *edev,
92 const struct qed_eth_ops *op = edev->ops;
115 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS,
123 op->ntuple_filter_config(edev->cdev, n, ¶ms);
127 qede_free_arfs_filter(struct qede_dev *edev, struct qede_arfs_fltr_node *fltr)
132 clear_bit(fltr->sw_id, edev->arfs->arfs_fltr_bmap);
138 qede_enqueue_fltr_and_config_searcher(struct qede_dev *edev,
142 fltr->mapping = dma_map_single(&edev->pdev->dev, fltr->data,
144 if (dma_mapping_error(&edev->pdev->dev, fltr->mapping)) {
145 DP_NOTICE(edev, "Failed to map DMA memory for rule\n");
146 qede_free_arfs_filter(edev, fltr);
152 QEDE_ARFS_BUCKET_HEAD(edev, bucket_idx));
154 edev->arfs->filter_count++;
155 if (edev->arfs->filter_count == 1 &&
156 edev->arfs->mode == QED_FILTER_CONFIG_MODE_DISABLE) {
157 edev->ops->configure_arfs_searcher(edev->cdev,
159 edev->arfs->mode = fltr->tuple.mode;
166 qede_dequeue_fltr_and_config_searcher(struct qede_dev *edev,
170 dma_unmap_single(&edev->pdev->dev, fltr->mapping,
173 qede_free_arfs_filter(edev, fltr);
175 edev->arfs->filter_count--;
176 if (!edev->arfs->filter_count &&
177 edev->arfs->mode != QED_FILTER_CONFIG_MODE_DISABLE) {
181 edev->ops->configure_arfs_searcher(edev->cdev, mode);
182 edev->arfs->mode = QED_FILTER_CONFIG_MODE_DISABLE;
189 struct qede_dev *edev = dev;
194 DP_NOTICE(edev,
200 spin_lock_bh(&edev->arfs->arfs_list_lock);
205 spin_unlock_bh(&edev->arfs->arfs_list_lock);
209 spin_lock_bh(&edev->arfs->arfs_list_lock);
216 qede_configure_arfs_fltr(edev, fltr, fltr->rxq_id,
222 qede_configure_arfs_fltr(edev, fltr,
227 spin_unlock_bh(&edev->arfs->arfs_list_lock);
231 void qede_process_arfs_filters(struct qede_dev *edev, bool free_fltr)
240 head = &edev->arfs->arfs_hl_head[i];
245 if (edev->state != QEDE_STATE_OPEN)
248 spin_lock_bh(&edev->arfs->arfs_list_lock);
252 qede_dequeue_fltr_and_config_searcher(edev,
257 flow_exp = rps_may_expire_flow(edev->ndev,
263 qede_configure_arfs_fltr(edev, fltr,
268 spin_unlock_bh(&edev->arfs->arfs_list_lock);
273 spin_lock_bh(&edev->arfs->arfs_list_lock);
275 if (edev->arfs->filter_count) {
276 set_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags);
277 schedule_delayed_work(&edev->sp_task,
281 spin_unlock_bh(&edev->arfs->arfs_list_lock);
288 void qede_poll_for_freeing_arfs_filters(struct qede_dev *edev)
293 qede_process_arfs_filters(edev, false);
295 if (!edev->arfs->filter_count)
303 DP_NOTICE(edev, "Timeout in polling for arfs filter free\n");
306 qede_process_arfs_filters(edev, true);
310 int qede_alloc_arfs(struct qede_dev *edev)
314 if (!edev->dev_info.common.b_arfs_capable)
317 edev->arfs = vzalloc(sizeof(*edev->arfs));
318 if (!edev->arfs)
321 spin_lock_init(&edev->arfs->arfs_list_lock);
324 INIT_HLIST_HEAD(QEDE_ARFS_BUCKET_HEAD(edev, i));
326 edev->arfs->arfs_fltr_bmap =
329 if (!edev->arfs->arfs_fltr_bmap) {
330 vfree(edev->arfs);
331 edev->arfs = NULL;
336 edev->ndev->rx_cpu_rmap = alloc_irq_cpu_rmap(QEDE_RSS_COUNT(edev));
337 if (!edev->ndev->rx_cpu_rmap) {
338 vfree(edev->arfs->arfs_fltr_bmap);
339 edev->arfs->arfs_fltr_bmap = NULL;
340 vfree(edev->arfs);
341 edev->arfs = NULL;
348 void qede_free_arfs(struct qede_dev *edev)
350 if (!edev->arfs)
354 if (edev->ndev->rx_cpu_rmap)
355 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
357 edev->ndev->rx_cpu_rmap = NULL;
359 vfree(edev->arfs->arfs_fltr_bmap);
360 edev->arfs->arfs_fltr_bmap = NULL;
361 vfree(edev->arfs);
362 edev->arfs = NULL;
405 qede_alloc_filter(struct qede_dev *edev, int min_hlen)
410 bit_id = find_first_zero_bit(edev->arfs->arfs_fltr_bmap,
427 set_bit(bit_id, edev->arfs->arfs_fltr_bmap);
434 struct qede_dev *edev = netdev_priv(dev);
463 spin_lock_bh(&edev->arfs->arfs_list_lock);
465 n = qede_arfs_htbl_key_search(QEDE_ARFS_BUCKET_HEAD(edev, tbl_idx),
473 qede_configure_arfs_fltr(edev, n, n->rxq_id,
478 qede_configure_arfs_fltr(edev, n, n->rxq_id,
489 n = qede_alloc_filter(edev, min_hlen);
519 rc = qede_enqueue_fltr_and_config_searcher(edev, n, tbl_idx);
523 qede_configure_arfs_fltr(edev, n, n->rxq_id, true);
525 spin_unlock_bh(&edev->arfs->arfs_list_lock);
527 set_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags);
528 schedule_delayed_work(&edev->sp_task, 0);
533 spin_unlock_bh(&edev->arfs->arfs_list_lock);
540 struct qede_dev *edev = dev;
542 if (edev->vxlan_dst_port != vxlan_port)
543 edev->vxlan_dst_port = 0;
545 if (edev->geneve_dst_port != geneve_port)
546 edev->geneve_dst_port = 0;
551 struct qede_dev *edev = dev;
553 __qede_lock(edev);
556 __qede_unlock(edev);
560 eth_hw_addr_set(edev->ndev, mac);
561 __qede_unlock(edev);
564 void qede_fill_rss_params(struct qede_dev *edev,
570 if (QEDE_RSS_COUNT(edev) <= 1) {
578 if (edev->rss_ind_table[i] >= QEDE_RSS_COUNT(edev)) {
584 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) || need_reset) {
588 val = QEDE_RSS_COUNT(edev);
590 edev->rss_ind_table[i] = indir_val;
592 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
597 u16 idx = QEDE_RX_QUEUE_IDX(edev, edev->rss_ind_table[i]);
599 rss->rss_ind_table[i] = edev->fp_array[idx].rxq->handle;
602 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
603 netdev_rss_key_fill(edev->rss_key, sizeof(edev->rss_key));
604 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
606 memcpy(rss->rss_key, edev->rss_key, sizeof(rss->rss_key));
608 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
609 edev->rss_caps = QED_RSS_IPV4 | QED_RSS_IPV6 |
611 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
613 rss->rss_caps = edev->rss_caps;
618 static int qede_set_ucast_rx_mac(struct qede_dev *edev,
629 return edev->ops->filter_config_ucast(edev->cdev, &ucast);
632 static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
643 return edev->ops->filter_config_ucast(edev->cdev, &ucast);
646 static int qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
652 if (edev->accept_any_vlan == action)
663 rc = edev->ops->vport_update(edev->cdev, params);
665 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
668 DP_INFO(edev, "%s accept-any-vlan\n",
670 edev->accept_any_vlan = action;
679 struct qede_dev *edev = netdev_priv(dev);
683 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
687 DP_INFO(edev, "Failed to allocate struct for vlan\n");
695 list_for_each_entry(tmp, &edev->vlan_list, list) {
697 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
705 __qede_lock(edev);
706 if (edev->state != QEDE_STATE_OPEN) {
707 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
711 edev->non_configured_vlans++;
712 list_add(&vlan->list, &edev->vlan_list);
720 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
722 rc = qede_set_ucast_rx_vlan(edev,
726 DP_ERR(edev, "Failed to configure VLAN %d\n",
735 edev->configured_vlans++;
738 if (!edev->non_configured_vlans) {
739 rc = qede_config_accept_any_vlan(edev, true);
746 edev->non_configured_vlans++;
749 list_add(&vlan->list, &edev->vlan_list);
752 __qede_unlock(edev);
756 static void qede_del_vlan_from_list(struct qede_dev *edev,
762 edev->configured_vlans--;
764 edev->non_configured_vlans--;
771 int qede_configure_vlan_filters(struct qede_dev *edev)
777 if (list_empty(&edev->vlan_list))
780 dev_info = &edev->dev_info;
783 list_for_each_entry(vlan, &edev->vlan_list, list) {
789 (edev->configured_vlans == dev_info->num_vlan_filters)) {
794 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
796 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
799 DP_ERR(edev, "Failed to configure VLAN %u\n",
808 edev->non_configured_vlans--;
809 edev->configured_vlans++;
819 rc = qede_config_accept_any_vlan(edev, true);
820 else if (!edev->non_configured_vlans)
821 rc = qede_config_accept_any_vlan(edev, false);
831 struct qede_dev *edev = netdev_priv(dev);
835 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
838 __qede_lock(edev);
839 list_for_each_entry(vlan, &edev->vlan_list, list)
843 if (list_entry_is_head(vlan, &edev->vlan_list, list)) {
844 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
849 if (edev->state != QEDE_STATE_OPEN) {
853 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
855 qede_del_vlan_from_list(edev, vlan);
861 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
864 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
869 qede_del_vlan_from_list(edev, vlan);
874 rc = qede_configure_vlan_filters(edev);
877 __qede_unlock(edev);
881 void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
885 if (list_empty(&edev->vlan_list))
888 list_for_each_entry(vlan, &edev->vlan_list, list) {
896 edev->non_configured_vlans++;
897 edev->configured_vlans--;
900 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
904 edev->accept_any_vlan = false;
907 static void qede_set_features_reload(struct qede_dev *edev,
910 edev->ndev->features = args->u.features;
916 struct qede_dev *edev = netdev_priv(dev);
918 if (edev->xdp_prog || edev->ndev->mtu > PAGE_SIZE ||
927 struct qede_dev *edev = netdev_priv(dev);
944 __qede_lock(edev);
945 if (edev->xdp_prog)
946 args.func(edev, &args);
948 qede_reload(edev, &args, true);
949 __qede_unlock(edev);
959 struct qede_dev *edev = netdev_priv(dev);
971 save_port = &edev->vxlan_dst_port;
975 save_port = &edev->geneve_dst_port;
978 __qede_lock(edev);
979 rc = edev->ops->tunn_config(edev->cdev, &tunn_params);
980 __qede_unlock(edev);
1009 void qede_set_udp_tunnels(struct qede_dev *edev)
1011 if (edev->dev_info.common.vxlan_enable &&
1012 edev->dev_info.common.geneve_enable)
1013 edev->ndev->udp_tunnel_nic_info = &qede_udp_tunnels_both;
1014 else if (edev->dev_info.common.vxlan_enable)
1015 edev->ndev->udp_tunnel_nic_info = &qede_udp_tunnels_vxlan;
1016 else if (edev->dev_info.common.geneve_enable)
1017 edev->ndev->udp_tunnel_nic_info = &qede_udp_tunnels_geneve;
1020 static void qede_xdp_reload_func(struct qede_dev *edev,
1025 old = xchg(&edev->xdp_prog, args->u.new_prog);
1030 static int qede_xdp_set(struct qede_dev *edev, struct bpf_prog *prog)
1037 qede_reload(edev, &args, false);
1044 struct qede_dev *edev = netdev_priv(dev);
1048 return qede_xdp_set(edev, xdp->prog);
1054 static int qede_set_mcast_rx_mac(struct qede_dev *edev,
1068 return edev->ops->filter_config_mcast(edev->cdev, &mcast);
1073 struct qede_dev *edev = netdev_priv(ndev);
1081 __qede_lock(edev);
1084 DP_NOTICE(edev, "The MAC address is not valid\n");
1089 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
1090 DP_NOTICE(edev, "qed prevents setting MAC %pM\n",
1096 if (edev->state == QEDE_STATE_OPEN) {
1098 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
1105 DP_INFO(edev, "Setting device MAC to %pM\n", addr->sa_data);
1107 if (edev->state != QEDE_STATE_OPEN) {
1108 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1111 if (IS_VF(edev) && edev->ops->req_bulletin_update_mac)
1112 edev->ops->req_bulletin_update_mac(edev->cdev,
1117 edev->ops->common->update_mac(edev->cdev, ndev->dev_addr);
1119 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
1122 __qede_unlock(edev);
1130 struct qede_dev *edev = netdev_priv(ndev);
1140 DP_NOTICE(edev,
1149 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
1172 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
1183 struct qede_dev *edev = netdev_priv(ndev);
1185 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
1186 schedule_delayed_work(&edev->sp_task, 0);
1193 struct qede_dev *edev = netdev_priv(ndev);
1206 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
1222 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
1223 edev->ndev->dev_addr);
1234 if (uc_count < edev->dev_info.num_mac_filters) {
1239 rc = qede_set_ucast_rx_mac(edev,
1257 qede_config_accept_any_vlan(edev, true);
1258 } else if (!edev->non_configured_vlans) {
1263 qede_config_accept_any_vlan(edev, false);
1266 edev->ops->filter_config_rx_mode(edev->cdev, accept_flags);
1283 int qede_get_cls_rule_all(struct qede_dev *edev, struct ethtool_rxnfc *info,
1292 __qede_lock(edev);
1294 if (!edev->arfs) {
1299 head = QEDE_ARFS_BUCKET_HEAD(edev, 0);
1314 __qede_unlock(edev);
1318 int qede_get_cls_rule_entry(struct qede_dev *edev, struct ethtool_rxnfc *cmd)
1326 __qede_lock(edev);
1328 if (!edev->arfs) {
1333 fltr = qede_get_arfs_fltr_by_loc(QEDE_ARFS_BUCKET_HEAD(edev, 0),
1336 DP_NOTICE(edev, "Rule not found - location=0x%x\n",
1375 __qede_unlock(edev);
1380 qede_poll_arfs_filter_config(struct qede_dev *edev,
1391 DP_NOTICE(edev, "Timeout in polling filter config\n");
1392 qede_dequeue_fltr_and_config_searcher(edev, fltr);
1500 static int qede_flow_spec_validate_unused(struct qede_dev *edev,
1504 DP_INFO(edev, "Don't support MAC extensions\n");
1510 DP_INFO(edev, "Don't support vlan-based classification\n");
1516 DP_INFO(edev, "Don't support user defined data\n");
1588 qede_flow_find_fltr(struct qede_dev *edev, struct qede_arfs_tuple *t)
1594 head = QEDE_ARFS_BUCKET_HEAD(edev, 0);
1607 static void qede_flow_set_destination(struct qede_dev *edev,
1621 DP_VERBOSE(edev, QED_MSG_SP,
1625 int qede_delete_flow_filter(struct qede_dev *edev, u64 cookie)
1630 __qede_lock(edev);
1631 if (!edev->arfs)
1634 fltr = qede_get_arfs_fltr_by_loc(QEDE_ARFS_BUCKET_HEAD(edev, 0),
1639 qede_configure_arfs_fltr(edev, fltr, fltr->rxq_id, false);
1641 rc = qede_poll_arfs_filter_config(edev, fltr);
1643 qede_dequeue_fltr_and_config_searcher(edev, fltr);
1646 __qede_unlock(edev);
1650 int qede_get_arfs_filter_count(struct qede_dev *edev)
1654 __qede_lock(edev);
1656 if (!edev->arfs)
1659 count = edev->arfs->filter_count;
1662 __qede_unlock(edev);
1666 static int qede_parse_actions(struct qede_dev *edev,
1689 if (act->queue.index >= QEDE_RSS_COUNT(edev)) {
1882 int qede_add_tc_flower_fltr(struct qede_dev *edev, __be16 proto,
1890 __qede_lock(edev);
1892 if (!edev->arfs) {
1903 if ((edev->arfs->filter_count && edev->arfs->mode != t.mode) ||
1904 edev->arfs->filter_count == QEDE_RFS_MAX_FLTR) {
1905 DP_NOTICE(edev,
1907 t.mode, edev->arfs->mode, edev->arfs->filter_count);
1913 rc = qede_parse_actions(edev, &f->rule->action, extack);
1917 if (qede_flow_find_fltr(edev, &t)) {
1945 rc = qede_enqueue_fltr_and_config_searcher(edev, n, 0);
1949 qede_configure_arfs_fltr(edev, n, n->rxq_id, true);
1950 rc = qede_poll_arfs_filter_config(edev, n);
1953 __qede_unlock(edev);
1957 static int qede_flow_spec_validate(struct qede_dev *edev,
1966 DP_INFO(edev, "Location out-of-bounds\n");
1971 if (test_bit(location, edev->arfs->arfs_fltr_bmap)) {
1972 DP_INFO(edev, "Location already in use\n");
1977 if (edev->arfs->filter_count &&
1978 edev->arfs->mode != t->mode) {
1979 DP_INFO(edev,
1981 t->mode, edev->arfs->filter_count);
1985 err = qede_parse_actions(edev, flow_action, extack);
1992 static int qede_flow_spec_to_rule(struct qede_dev *edev,
2002 err = qede_flow_spec_validate_unused(edev, fs);
2016 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2031 err = qede_flow_spec_validate(edev, &flow->rule->action, t,
2035 DP_NOTICE(edev, "%s\n", extack._msg);
2041 int qede_add_cls_rule(struct qede_dev *edev, struct ethtool_rxnfc *info)
2048 __qede_lock(edev);
2050 if (!edev->arfs) {
2056 rc = qede_flow_spec_to_rule(edev, &t, fsp);
2060 if (qede_flow_find_fltr(edev, &t)) {
2080 set_bit(n->sw_id, edev->arfs->arfs_fltr_bmap);
2085 qede_flow_set_destination(edev, n, fsp);
2090 rc = qede_enqueue_fltr_and_config_searcher(edev, n, 0);
2094 qede_configure_arfs_fltr(edev, n, n->rxq_id, true);
2095 rc = qede_poll_arfs_filter_config(edev, n);
2097 __qede_unlock(edev);