Lines Matching refs:p_hwfn
63 static void qed_db_recovery_dp_entry(struct qed_hwfn *p_hwfn,
67 DP_VERBOSE(p_hwfn,
112 struct qed_hwfn *p_hwfn;
116 p_hwfn = db_addr < cdev->hwfns[1].doorbells ?
119 p_hwfn = QED_LEADING_HWFN(cdev);
121 return p_hwfn;
132 struct qed_hwfn *p_hwfn;
146 p_hwfn = qed_db_rec_find_hwfn(cdev, db_addr);
160 db_entry->hwfn_idx = p_hwfn->my_id;
163 qed_db_recovery_dp_entry(p_hwfn, db_entry, "Adding");
166 spin_lock_bh(&p_hwfn->db_recovery_info.lock);
167 list_add_tail(&db_entry->list_entry, &p_hwfn->db_recovery_info.list);
168 spin_unlock_bh(&p_hwfn->db_recovery_info.lock);
178 struct qed_hwfn *p_hwfn;
189 p_hwfn = qed_db_rec_find_hwfn(cdev, db_addr);
192 spin_lock_bh(&p_hwfn->db_recovery_info.lock);
194 &p_hwfn->db_recovery_info.list, list_entry) {
197 qed_db_recovery_dp_entry(p_hwfn, db_entry, "Deleting");
204 spin_unlock_bh(&p_hwfn->db_recovery_info.lock);
208 DP_NOTICE(p_hwfn,
218 static int qed_db_recovery_setup(struct qed_hwfn *p_hwfn)
220 DP_VERBOSE(p_hwfn, QED_MSG_SPQ, "Setting up db recovery\n");
223 if (!p_hwfn->cdev->db_size) {
224 DP_ERR(p_hwfn->cdev, "db_size not set\n");
228 INIT_LIST_HEAD(&p_hwfn->db_recovery_info.list);
229 spin_lock_init(&p_hwfn->db_recovery_info.lock);
230 p_hwfn->db_recovery_info.db_recovery_counter = 0;
236 static void qed_db_recovery_teardown(struct qed_hwfn *p_hwfn)
240 DP_VERBOSE(p_hwfn, QED_MSG_SPQ, "Tearing down db recovery\n");
241 if (!list_empty(&p_hwfn->db_recovery_info.list)) {
242 DP_VERBOSE(p_hwfn,
245 while (!list_empty(&p_hwfn->db_recovery_info.list)) {
247 list_first_entry(&p_hwfn->db_recovery_info.list,
250 qed_db_recovery_dp_entry(p_hwfn, db_entry, "Purging");
255 p_hwfn->db_recovery_info.db_recovery_counter = 0;
259 void qed_db_recovery_dp(struct qed_hwfn *p_hwfn)
263 DP_NOTICE(p_hwfn,
265 p_hwfn->db_recovery_info.db_recovery_counter);
268 spin_lock_bh(&p_hwfn->db_recovery_info.lock);
270 &p_hwfn->db_recovery_info.list, list_entry) {
271 qed_db_recovery_dp_entry(p_hwfn, db_entry, "Printing");
274 spin_unlock_bh(&p_hwfn->db_recovery_info.lock);
278 static void qed_db_recovery_ring(struct qed_hwfn *p_hwfn,
283 DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
288 DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
295 if (!qed_db_rec_sanity(p_hwfn->cdev, db_entry->db_addr,
320 void qed_db_recovery_execute(struct qed_hwfn *p_hwfn)
324 DP_NOTICE(p_hwfn, "Executing doorbell recovery. Counter was %d\n",
325 p_hwfn->db_recovery_info.db_recovery_counter);
328 p_hwfn->db_recovery_info.db_recovery_counter++;
331 spin_lock_bh(&p_hwfn->db_recovery_info.lock);
333 &p_hwfn->db_recovery_info.list, list_entry)
334 qed_db_recovery_ring(p_hwfn, db_entry);
335 spin_unlock_bh(&p_hwfn->db_recovery_info.lock);
641 qed_llh_set_engine_affin(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
643 struct qed_dev *cdev = p_hwfn->cdev;
648 rc = qed_mcp_get_engine_config(p_hwfn, p_ptt);
650 DP_NOTICE(p_hwfn,
656 if (QED_IS_ROCE_PERSONALITY(p_hwfn)) {
672 if (QED_IS_FCOE_PERSONALITY(p_hwfn) || QED_IS_ISCSI_PERSONALITY(p_hwfn) ||
673 QED_IS_NVMETCP_PERSONALITY(p_hwfn))
695 static int qed_llh_hw_init_pf(struct qed_hwfn *p_hwfn,
698 struct qed_dev *cdev = p_hwfn->cdev;
710 qed_wr(p_hwfn, p_ptt, addr, p_hwfn->rel_pf_id);
714 !QED_IS_FCOE_PERSONALITY(p_hwfn)) {
716 p_hwfn->hw_info.hw_mac_addr);
723 rc = qed_llh_set_engine_affin(p_hwfn, p_ptt);
743 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
744 struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn);
776 val = qed_rd(p_hwfn, p_ptt, addr);
778 qed_wr(p_hwfn, p_ptt, addr, val);
781 if (!ppfid && QED_IS_IWARP_PERSONALITY(p_hwfn))
784 qed_ptt_release(p_hwfn, p_ptt);
791 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
792 struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn);
812 qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_ENG_CLS_ROCE_QP_SEL,
827 val = qed_rd(p_hwfn, p_ptt, addr);
829 qed_wr(p_hwfn, p_ptt, addr, val);
832 qed_ptt_release(p_hwfn, p_ptt);
846 qed_llh_access_filter(struct qed_hwfn *p_hwfn,
865 if (QED_IS_BB(p_hwfn->cdev))
868 pfid = abs_ppfid * p_hwfn->cdev->num_ports_in_engine +
869 MFW_PORT(p_hwfn);
873 qed_fid_pretend(p_hwfn, p_ptt,
877 qed_wr(p_hwfn, p_ptt, addr, p_details->enable);
879 qed_fid_pretend(p_hwfn, p_ptt,
880 p_hwfn->rel_pf_id <<
889 rc = qed_dmae_host2grc(p_hwfn,
897 qed_fid_pretend(p_hwfn, p_ptt,
902 qed_wr(p_hwfn, p_ptt, addr, p_details->mode);
906 qed_wr(p_hwfn, p_ptt, addr, p_details->protocol_type);
910 qed_wr(p_hwfn, p_ptt, addr, p_details->hdr_sel);
915 qed_wr(p_hwfn, p_ptt, addr, p_details->enable);
918 qed_fid_pretend(p_hwfn, p_ptt,
919 p_hwfn->rel_pf_id <<
926 qed_llh_add_filter(struct qed_hwfn *p_hwfn,
940 return qed_llh_access_filter(p_hwfn, p_ptt, abs_ppfid, filter_idx,
945 qed_llh_remove_filter(struct qed_hwfn *p_hwfn,
950 return qed_llh_access_filter(p_hwfn, p_ptt, abs_ppfid, filter_idx,
957 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
958 struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn);
986 rc = qed_llh_add_filter(p_hwfn, p_ptt, abs_ppfid, filter_idx,
1003 qed_ptt_release(p_hwfn, p_ptt);
1090 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
1091 struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn);
1132 rc = qed_llh_add_filter(p_hwfn, p_ptt, abs_ppfid,
1145 err: DP_NOTICE(p_hwfn,
1149 qed_ptt_release(p_hwfn, p_ptt);
1157 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
1158 struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn);
1170 if (QED_IS_NVMETCP_PERSONALITY(p_hwfn))
1185 rc = qed_llh_remove_filter(p_hwfn, p_ptt, abs_ppfid,
1202 qed_ptt_release(p_hwfn, p_ptt);
1210 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
1211 struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn);
1243 rc = qed_llh_remove_filter(p_hwfn, p_ptt, abs_ppfid,
1260 qed_ptt_release(p_hwfn, p_ptt);
1268 static u32 qed_hw_bar_size(struct qed_hwfn *p_hwfn,
1275 if (IS_VF(p_hwfn->cdev))
1276 return qed_vf_hw_bar_size(p_hwfn, bar_id);
1278 val = qed_rd(p_hwfn, p_ptt, bar_reg);
1283 if (p_hwfn->cdev->num_hwfns > 1) {
1284 DP_INFO(p_hwfn,
1288 DP_INFO(p_hwfn,
1301 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1303 p_hwfn->dp_level = dp_level;
1304 p_hwfn->dp_module = dp_module;
1313 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1315 p_hwfn->cdev = cdev;
1316 p_hwfn->my_id = i;
1317 p_hwfn->b_active = false;
1319 mutex_init(&p_hwfn->dmae_info.mutex);
1329 static void qed_qm_info_free(struct qed_hwfn *p_hwfn)
1331 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1343 static void qed_dbg_user_data_free(struct qed_hwfn *p_hwfn)
1345 kfree(p_hwfn->dbg_user_info);
1346 p_hwfn->dbg_user_info = NULL;
1352 struct qed_hwfn *p_hwfn;
1370 p_hwfn = cdev->hwfns + i;
1371 rdma_info = p_hwfn->p_rdma_info;
1373 qed_cxt_mngr_free(p_hwfn);
1374 qed_qm_info_free(p_hwfn);
1375 qed_spq_free(p_hwfn);
1376 qed_eq_free(p_hwfn);
1377 qed_consq_free(p_hwfn);
1378 qed_int_free(p_hwfn);
1380 qed_ll2_free(p_hwfn);
1382 if (p_hwfn->hw_info.personality == QED_PCI_FCOE)
1383 qed_fcoe_free(p_hwfn);
1385 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) {
1386 qed_iscsi_free(p_hwfn);
1387 qed_ooo_free(p_hwfn);
1390 if (p_hwfn->hw_info.personality == QED_PCI_NVMETCP) {
1391 qed_nvmetcp_free(p_hwfn);
1392 qed_ooo_free(p_hwfn);
1395 if (QED_IS_RDMA_PERSONALITY(p_hwfn) && rdma_info) {
1396 qed_spq_unregister_async_cb(p_hwfn, rdma_info->proto);
1397 qed_rdma_info_free(p_hwfn);
1400 qed_spq_unregister_async_cb(p_hwfn, PROTOCOLID_COMMON);
1401 qed_iov_free(p_hwfn);
1402 qed_l2_free(p_hwfn);
1403 qed_dmae_info_free(p_hwfn);
1404 qed_dcbx_info_free(p_hwfn);
1405 qed_dbg_user_data_free(p_hwfn);
1406 qed_fw_overlay_mem_free(p_hwfn, &p_hwfn->fw_overlay_mem);
1409 qed_db_recovery_teardown(p_hwfn);
1418 static u32 qed_get_pq_flags(struct qed_hwfn *p_hwfn)
1426 if (IS_QED_SRIOV(p_hwfn->cdev))
1430 switch (p_hwfn->hw_info.personality) {
1443 if (IS_QED_MULTI_TC_ROCE(p_hwfn))
1451 DP_ERR(p_hwfn,
1452 "unknown personality %d\n", p_hwfn->hw_info.personality);
1460 static u8 qed_init_qm_get_num_tcs(struct qed_hwfn *p_hwfn)
1462 return p_hwfn->hw_info.num_hw_tc;
1465 static u16 qed_init_qm_get_num_vfs(struct qed_hwfn *p_hwfn)
1467 return IS_QED_SRIOV(p_hwfn->cdev) ?
1468 p_hwfn->cdev->p_iov_info->total_vfs : 0;
1471 static u8 qed_init_qm_get_num_mtc_tcs(struct qed_hwfn *p_hwfn)
1473 u32 pq_flags = qed_get_pq_flags(p_hwfn);
1478 return qed_init_qm_get_num_tcs(p_hwfn);
1483 static u16 qed_init_qm_get_num_pf_rls(struct qed_hwfn *p_hwfn)
1485 u16 num_pf_rls, num_vfs = qed_init_qm_get_num_vfs(p_hwfn);
1488 num_pf_rls = (u16)min_t(u32, RESC_NUM(p_hwfn, QED_RL),
1489 RESC_NUM(p_hwfn, QED_VPORT));
1501 static u16 qed_init_qm_get_num_vports(struct qed_hwfn *p_hwfn)
1503 u32 pq_flags = qed_get_pq_flags(p_hwfn);
1507 qed_init_qm_get_num_pf_rls(p_hwfn) +
1509 qed_init_qm_get_num_vfs(p_hwfn) + 1;
1513 static u16 qed_init_qm_get_num_pqs(struct qed_hwfn *p_hwfn)
1515 u32 pq_flags = qed_get_pq_flags(p_hwfn);
1518 qed_init_qm_get_num_pf_rls(p_hwfn) +
1520 qed_init_qm_get_num_tcs(p_hwfn) +
1524 qed_init_qm_get_num_mtc_tcs(p_hwfn) +
1526 qed_init_qm_get_num_mtc_tcs(p_hwfn) +
1527 (!!(PQ_FLAGS_VFS & pq_flags)) * qed_init_qm_get_num_vfs(p_hwfn);
1531 static void qed_init_qm_params(struct qed_hwfn *p_hwfn)
1533 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1537 qm_info->start_pq = (u16)RESC_START(p_hwfn, QED_PQ);
1538 qm_info->start_vport = (u8)RESC_START(p_hwfn, QED_VPORT);
1545 four_port = p_hwfn->cdev->num_ports_in_engine == MAX_NUM_PORTS_K2;
1560 static void qed_init_qm_vport_params(struct qed_hwfn *p_hwfn)
1562 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1566 for (i = 0; i < qed_init_qm_get_num_vports(p_hwfn); i++)
1571 static void qed_init_qm_port_params(struct qed_hwfn *p_hwfn)
1574 u8 i, active_phys_tcs, num_ports = p_hwfn->cdev->num_ports_in_engine;
1575 struct qed_dev *cdev = p_hwfn->cdev;
1584 &p_hwfn->qm_info.qm_port_params[i];
1601 static void qed_init_qm_reset_params(struct qed_hwfn *p_hwfn)
1603 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1614 static void qed_init_qm_advance_vport(struct qed_hwfn *p_hwfn)
1616 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1620 if (qm_info->num_vports > qed_init_qm_get_num_vports(p_hwfn))
1621 DP_ERR(p_hwfn,
1623 qm_info->num_vports, qed_init_qm_get_num_vports(p_hwfn));
1647 static bool qed_is_offload_tc_set(struct qed_hwfn *p_hwfn)
1649 return p_hwfn->hw_info.offload_tc_set;
1652 static u32 qed_get_offload_tc(struct qed_hwfn *p_hwfn)
1654 if (qed_is_offload_tc_set(p_hwfn))
1655 return p_hwfn->hw_info.offload_tc;
1660 static void qed_init_qm_pq(struct qed_hwfn *p_hwfn,
1664 u16 pq_idx = qm_info->num_pqs, max_pq = qed_init_qm_get_num_pqs(p_hwfn);
1667 DP_ERR(p_hwfn,
1671 qm_info->qm_pq_params[pq_idx].port_id = p_hwfn->port_id;
1687 if (qm_info->num_vports > qed_init_qm_get_num_vports(p_hwfn))
1688 DP_ERR(p_hwfn,
1690 qm_info->num_vports, qed_init_qm_get_num_vports(p_hwfn));
1692 if (qm_info->num_pf_rls > qed_init_qm_get_num_pf_rls(p_hwfn))
1693 DP_ERR(p_hwfn,
1695 qm_info->num_pf_rls, qed_init_qm_get_num_pf_rls(p_hwfn));
1699 static u16 *qed_init_qm_get_idx_from_flags(struct qed_hwfn *p_hwfn,
1702 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1707 DP_ERR(p_hwfn, "requested multiple pq flags 0x%lx\n", pq_flags);
1711 if (!(qed_get_pq_flags(p_hwfn) & pq_flags)) {
1712 DP_ERR(p_hwfn, "pq flag 0x%lx is not set\n", pq_flags);
1742 static void qed_init_qm_set_idx(struct qed_hwfn *p_hwfn,
1745 u16 *base_pq_idx = qed_init_qm_get_idx_from_flags(p_hwfn, pq_flags);
1747 *base_pq_idx = p_hwfn->qm_info.start_pq + pq_val;
1751 u16 qed_get_cm_pq_idx(struct qed_hwfn *p_hwfn, u32 pq_flags)
1753 u16 *base_pq_idx = qed_init_qm_get_idx_from_flags(p_hwfn, pq_flags);
1758 u16 qed_get_cm_pq_idx_mcos(struct qed_hwfn *p_hwfn, u8 tc)
1760 u8 max_tc = qed_init_qm_get_num_tcs(p_hwfn);
1763 DP_ERR(p_hwfn, "pq with flag 0x%lx do not exist\n",
1765 return p_hwfn->qm_info.start_pq;
1769 DP_ERR(p_hwfn, "tc %d must be smaller than %d\n", tc, max_tc);
1771 return qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_MCOS) + (tc % max_tc);
1774 u16 qed_get_cm_pq_idx_vf(struct qed_hwfn *p_hwfn, u16 vf)
1776 u16 max_vf = qed_init_qm_get_num_vfs(p_hwfn);
1779 DP_ERR(p_hwfn, "pq with flag 0x%lx do not exist\n",
1781 return p_hwfn->qm_info.start_pq;
1785 DP_ERR(p_hwfn, "vf %d must be smaller than %d\n", vf, max_vf);
1787 return qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_VFS) + (vf % max_vf);
1790 u16 qed_get_cm_pq_idx_ofld_mtc(struct qed_hwfn *p_hwfn, u8 tc)
1794 first_ofld_pq = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
1795 pq_offset = (tc < qed_init_qm_get_num_mtc_tcs(p_hwfn)) ?
1801 u16 qed_get_cm_pq_idx_llt_mtc(struct qed_hwfn *p_hwfn, u8 tc)
1805 first_llt_pq = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LLT);
1806 pq_offset = (tc < qed_init_qm_get_num_mtc_tcs(p_hwfn)) ?
1813 static void qed_init_qm_lb_pq(struct qed_hwfn *p_hwfn)
1815 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1817 if (!(qed_get_pq_flags(p_hwfn) & PQ_FLAGS_LB))
1820 qed_init_qm_set_idx(p_hwfn, PQ_FLAGS_LB, qm_info->num_pqs);
1821 qed_init_qm_pq(p_hwfn, qm_info, PURE_LB_TC, PQ_INIT_SHARE_VPORT);
1824 static void qed_init_qm_ooo_pq(struct qed_hwfn *p_hwfn)
1826 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1828 if (!(qed_get_pq_flags(p_hwfn) & PQ_FLAGS_OOO))
1831 qed_init_qm_set_idx(p_hwfn, PQ_FLAGS_OOO, qm_info->num_pqs);
1832 qed_init_qm_pq(p_hwfn, qm_info, qm_info->ooo_tc, PQ_INIT_SHARE_VPORT);
1835 static void qed_init_qm_pure_ack_pq(struct qed_hwfn *p_hwfn)
1837 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1839 if (!(qed_get_pq_flags(p_hwfn) & PQ_FLAGS_ACK))
1842 qed_init_qm_set_idx(p_hwfn, PQ_FLAGS_ACK, qm_info->num_pqs);
1843 qed_init_qm_pq(p_hwfn, qm_info, qed_get_offload_tc(p_hwfn),
1847 static void qed_init_qm_mtc_pqs(struct qed_hwfn *p_hwfn)
1849 u8 num_tcs = qed_init_qm_get_num_mtc_tcs(p_hwfn);
1850 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1855 qed_init_qm_pq(p_hwfn, qm_info,
1856 qed_is_offload_tc_set(p_hwfn) ?
1857 p_hwfn->hw_info.offload_tc : tc,
1861 static void qed_init_qm_offload_pq(struct qed_hwfn *p_hwfn)
1863 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1865 if (!(qed_get_pq_flags(p_hwfn) & PQ_FLAGS_OFLD))
1868 qed_init_qm_set_idx(p_hwfn, PQ_FLAGS_OFLD, qm_info->num_pqs);
1869 qed_init_qm_mtc_pqs(p_hwfn);
1872 static void qed_init_qm_low_latency_pq(struct qed_hwfn *p_hwfn)
1874 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1876 if (!(qed_get_pq_flags(p_hwfn) & PQ_FLAGS_LLT))
1879 qed_init_qm_set_idx(p_hwfn, PQ_FLAGS_LLT, qm_info->num_pqs);
1880 qed_init_qm_mtc_pqs(p_hwfn);
1883 static void qed_init_qm_mcos_pqs(struct qed_hwfn *p_hwfn)
1885 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1888 if (!(qed_get_pq_flags(p_hwfn) & PQ_FLAGS_MCOS))
1891 qed_init_qm_set_idx(p_hwfn, PQ_FLAGS_MCOS, qm_info->num_pqs);
1892 for (tc_idx = 0; tc_idx < qed_init_qm_get_num_tcs(p_hwfn); tc_idx++)
1893 qed_init_qm_pq(p_hwfn, qm_info, tc_idx, PQ_INIT_SHARE_VPORT);
1896 static void qed_init_qm_vf_pqs(struct qed_hwfn *p_hwfn)
1898 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1899 u16 vf_idx, num_vfs = qed_init_qm_get_num_vfs(p_hwfn);
1901 if (!(qed_get_pq_flags(p_hwfn) & PQ_FLAGS_VFS))
1904 qed_init_qm_set_idx(p_hwfn, PQ_FLAGS_VFS, qm_info->num_pqs);
1907 qed_init_qm_pq(p_hwfn,
1911 static void qed_init_qm_rl_pqs(struct qed_hwfn *p_hwfn)
1913 u16 pf_rls_idx, num_pf_rls = qed_init_qm_get_num_pf_rls(p_hwfn);
1914 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1916 if (!(qed_get_pq_flags(p_hwfn) & PQ_FLAGS_RLS))
1919 qed_init_qm_set_idx(p_hwfn, PQ_FLAGS_RLS, qm_info->num_pqs);
1921 qed_init_qm_pq(p_hwfn, qm_info, qed_get_offload_tc(p_hwfn),
1925 static void qed_init_qm_pq_params(struct qed_hwfn *p_hwfn)
1928 qed_init_qm_rl_pqs(p_hwfn);
1931 qed_init_qm_mcos_pqs(p_hwfn);
1934 qed_init_qm_lb_pq(p_hwfn);
1937 qed_init_qm_ooo_pq(p_hwfn);
1940 qed_init_qm_pure_ack_pq(p_hwfn);
1943 qed_init_qm_offload_pq(p_hwfn);
1946 qed_init_qm_low_latency_pq(p_hwfn);
1949 qed_init_qm_advance_vport(p_hwfn);
1952 qed_init_qm_vf_pqs(p_hwfn);
1956 static int qed_init_qm_sanity(struct qed_hwfn *p_hwfn)
1958 if (qed_init_qm_get_num_vports(p_hwfn) > RESC_NUM(p_hwfn, QED_VPORT)) {
1959 DP_ERR(p_hwfn, "requested amount of vports exceeds resource\n");
1963 if (qed_init_qm_get_num_pqs(p_hwfn) <= RESC_NUM(p_hwfn, QED_PQ))
1966 if (QED_IS_ROCE_PERSONALITY(p_hwfn)) {
1967 p_hwfn->hw_info.multi_tc_roce_en = false;
1968 DP_NOTICE(p_hwfn,
1970 if (qed_init_qm_get_num_pqs(p_hwfn) <= RESC_NUM(p_hwfn, QED_PQ))
1974 DP_ERR(p_hwfn, "requested amount of pqs exceeds resource\n");
1978 static void qed_dp_init_qm_params(struct qed_hwfn *p_hwfn)
1980 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
1987 DP_VERBOSE(p_hwfn,
1996 DP_VERBOSE(p_hwfn,
2004 DP_VERBOSE(p_hwfn,
2013 qm_info->num_pf_rls, qed_get_pq_flags(p_hwfn));
2016 for (i = 0; i < p_hwfn->cdev->num_ports_in_engine; i++) {
2018 DP_VERBOSE(p_hwfn,
2031 DP_VERBOSE(p_hwfn,
2036 DP_VERBOSE(p_hwfn,
2039 DP_VERBOSE(p_hwfn, NETIF_MSG_HW, "]\n");
2045 DP_VERBOSE(p_hwfn,
2055 static void qed_init_qm_info(struct qed_hwfn *p_hwfn)
2058 qed_init_qm_reset_params(p_hwfn);
2061 qed_init_qm_params(p_hwfn);
2064 qed_init_qm_port_params(p_hwfn);
2067 qed_init_qm_vport_params(p_hwfn);
2070 qed_init_qm_pq_params(p_hwfn);
2073 qed_dp_init_qm_params(p_hwfn);
2084 int qed_qm_reconf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
2086 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
2091 qed_init_qm_info(p_hwfn);
2095 b_rc = qed_send_qm_stop_cmd(p_hwfn, p_ptt, false, true,
2102 qed_qm_init_pf(p_hwfn, p_ptt, false);
2105 rc = qed_init_run(p_hwfn, p_ptt, PHASE_QM_PF, p_hwfn->rel_pf_id,
2106 p_hwfn->hw_info.hw_mode);
2112 b_rc = qed_send_qm_stop_cmd(p_hwfn, p_ptt, true, true,
2121 static int qed_alloc_qm_data(struct qed_hwfn *p_hwfn)
2123 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
2126 rc = qed_init_qm_sanity(p_hwfn);
2130 qm_info->qm_pq_params = kcalloc(qed_init_qm_get_num_pqs(p_hwfn),
2136 qm_info->qm_vport_params = kcalloc(qed_init_qm_get_num_vports(p_hwfn),
2142 qm_info->qm_port_params = kcalloc(p_hwfn->cdev->num_ports_in_engine,
2148 qm_info->wfq_data = kcalloc(qed_init_qm_get_num_vports(p_hwfn),
2157 DP_NOTICE(p_hwfn, "Failed to allocate memory for QM params\n");
2158 qed_qm_info_free(p_hwfn);
2182 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
2186 rc = qed_db_recovery_setup(p_hwfn);
2191 rc = qed_cxt_mngr_alloc(p_hwfn);
2198 rc = qed_cxt_set_pf_params(p_hwfn, RDMA_MAX_TIDS);
2202 rc = qed_alloc_qm_data(p_hwfn);
2207 qed_init_qm_info(p_hwfn);
2210 rc = qed_cxt_cfg_ilt_compute(p_hwfn, &line_count);
2212 DP_NOTICE(p_hwfn,
2218 qed_cxt_cfg_ilt_compute_excess(p_hwfn, line_count);
2223 rc = qed_cxt_set_pf_params(p_hwfn, rdma_tasks);
2227 rc = qed_cxt_cfg_ilt_compute(p_hwfn, &line_count);
2229 DP_ERR(p_hwfn,
2240 rc = qed_cxt_tables_alloc(p_hwfn);
2245 rc = qed_spq_alloc(p_hwfn);
2250 p_hwfn->p_dpc_ptt = qed_get_reserved_ptt(p_hwfn,
2253 rc = qed_int_alloc(p_hwfn, p_hwfn->p_main_ptt);
2257 rc = qed_iov_alloc(p_hwfn);
2262 n_eqes = qed_chain_get_capacity(&p_hwfn->p_spq->chain);
2263 if (QED_IS_RDMA_PERSONALITY(p_hwfn)) {
2264 u32 n_srq = qed_cxt_get_total_srq_count(p_hwfn);
2267 if (QED_IS_ROCE_PERSONALITY(p_hwfn))
2272 num_cons = qed_cxt_get_proto_cid_count(p_hwfn,
2279 } else if (p_hwfn->hw_info.personality == QED_PCI_ISCSI ||
2280 p_hwfn->hw_info.personality == QED_PCI_NVMETCP) {
2282 qed_cxt_get_proto_cid_count(p_hwfn,
2289 DP_ERR(p_hwfn,
2295 rc = qed_eq_alloc(p_hwfn, (u16)n_eqes);
2299 rc = qed_consq_alloc(p_hwfn);
2303 rc = qed_l2_alloc(p_hwfn);
2308 if (p_hwfn->using_ll2) {
2309 rc = qed_ll2_alloc(p_hwfn);
2315 if (p_hwfn->hw_info.personality == QED_PCI_FCOE) {
2316 rc = qed_fcoe_alloc(p_hwfn);
2321 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) {
2322 rc = qed_iscsi_alloc(p_hwfn);
2325 rc = qed_ooo_alloc(p_hwfn);
2330 if (p_hwfn->hw_info.personality == QED_PCI_NVMETCP) {
2331 rc = qed_nvmetcp_alloc(p_hwfn);
2334 rc = qed_ooo_alloc(p_hwfn);
2339 if (QED_IS_RDMA_PERSONALITY(p_hwfn)) {
2340 rc = qed_rdma_info_alloc(p_hwfn);
2346 rc = qed_dmae_info_alloc(p_hwfn);
2351 rc = qed_dcbx_info_alloc(p_hwfn);
2355 rc = qed_dbg_alloc_user_data(p_hwfn, &p_hwfn->dbg_user_info);
2380 static int qed_fw_err_handler(struct qed_hwfn *p_hwfn,
2390 qed_sriov_vfpf_malicious(p_hwfn, &data->err_data);
2395 DP_ERR(p_hwfn,
2401 static int qed_common_eqe_event(struct qed_hwfn *p_hwfn,
2410 return qed_sriov_eqe_event(p_hwfn, opcode, echo, data,
2413 return qed_fw_err_handler(p_hwfn, opcode,
2417 DP_INFO(p_hwfn->cdev, "Unknown eqe event 0x%02x, echo 0x%x\n",
2434 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
2436 qed_cxt_mngr_setup(p_hwfn);
2437 qed_spq_setup(p_hwfn);
2438 qed_eq_setup(p_hwfn);
2439 qed_consq_setup(p_hwfn);
2442 qed_mcp_read_mb(p_hwfn, p_hwfn->p_main_ptt);
2443 memcpy(p_hwfn->mcp_info->mfw_mb_shadow,
2444 p_hwfn->mcp_info->mfw_mb_cur,
2445 p_hwfn->mcp_info->mfw_mb_length);
2447 qed_int_setup(p_hwfn, p_hwfn->p_main_ptt);
2449 qed_l2_setup(p_hwfn);
2450 qed_iov_setup(p_hwfn);
2451 qed_spq_register_async_cb(p_hwfn, PROTOCOLID_COMMON,
2454 if (p_hwfn->using_ll2)
2455 qed_ll2_setup(p_hwfn);
2457 if (p_hwfn->hw_info.personality == QED_PCI_FCOE)
2458 qed_fcoe_setup(p_hwfn);
2460 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI) {
2461 qed_iscsi_setup(p_hwfn);
2462 qed_ooo_setup(p_hwfn);
2465 if (p_hwfn->hw_info.personality == QED_PCI_NVMETCP) {
2466 qed_nvmetcp_setup(p_hwfn);
2467 qed_ooo_setup(p_hwfn);
2474 int qed_final_cleanup(struct qed_hwfn *p_hwfn,
2481 USTORM_FLR_FINAL_ACK, p_hwfn->rel_pf_id);
2492 if (REG_RD(p_hwfn, addr)) {
2493 DP_NOTICE(p_hwfn,
2495 REG_WR(p_hwfn, addr, 0);
2498 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2502 qed_wr(p_hwfn, p_ptt, XSDM_REG_OPERATION_GEN, command);
2505 while (!REG_RD(p_hwfn, addr) && count--)
2508 if (REG_RD(p_hwfn, addr))
2511 DP_NOTICE(p_hwfn,
2515 REG_WR(p_hwfn, addr, 0);
2520 static int qed_calc_hw_mode(struct qed_hwfn *p_hwfn)
2524 if (QED_IS_BB_B0(p_hwfn->cdev)) {
2526 } else if (QED_IS_AH(p_hwfn->cdev)) {
2529 DP_NOTICE(p_hwfn, "Unknown chip type %#x\n",
2530 p_hwfn->cdev->type);
2534 switch (p_hwfn->cdev->num_ports_in_engine) {
2545 DP_NOTICE(p_hwfn, "num_ports_in_engine = %d not supported\n",
2546 p_hwfn->cdev->num_ports_in_engine);
2550 if (test_bit(QED_MF_OVLAN_CLSS, &p_hwfn->cdev->mf_bits))
2557 if (p_hwfn->cdev->num_hwfns > 1)
2560 p_hwfn->hw_info.hw_mode = hw_mode;
2562 DP_VERBOSE(p_hwfn, (NETIF_MSG_PROBE | NETIF_MSG_IFUP),
2564 p_hwfn->hw_info.hw_mode);
2576 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
2581 p_igu_info = p_hwfn->hw_info.p_igu_info;
2590 qed_init_cau_sb_entry(p_hwfn, &sb_entry,
2592 STORE_RT_REG_AGG(p_hwfn, offset + igu_sb_id * 2,
2598 static void qed_init_cache_line_size(struct qed_hwfn *p_hwfn,
2603 val = qed_rd(p_hwfn, p_ptt, PSWRQ2_REG_WR_MBS0);
2615 DP_INFO(p_hwfn,
2636 DP_INFO(p_hwfn,
2642 DP_INFO(p_hwfn,
2646 STORE_RT_REG(p_hwfn, PGLUE_REG_B_CACHE_LINE_SIZE_RT_OFFSET, val);
2648 STORE_RT_REG(p_hwfn, PSWRQ2_REG_DRAM_ALIGN_WR_RT_OFFSET, val);
2649 STORE_RT_REG(p_hwfn, PSWRQ2_REG_DRAM_ALIGN_RD_RT_OFFSET, val);
2653 static int qed_hw_init_common(struct qed_hwfn *p_hwfn,
2656 struct qed_qm_info *qm_info = &p_hwfn->qm_info;
2658 struct qed_dev *cdev = p_hwfn->cdev;
2666 DP_NOTICE(p_hwfn->cdev,
2675 qed_gtt_init(p_hwfn);
2677 if (p_hwfn->mcp_info) {
2678 if (p_hwfn->mcp_info->func_info.bandwidth_max)
2680 if (p_hwfn->mcp_info->func_info.bandwidth_min)
2684 params->max_ports_per_engine = p_hwfn->cdev->num_ports_in_engine;
2692 qed_qm_common_rt_init(p_hwfn, params);
2694 qed_cxt_hw_init_common(p_hwfn);
2696 qed_init_cache_line_size(p_hwfn, p_ptt);
2698 rc = qed_init_run(p_hwfn, p_ptt, PHASE_ENGINE, ANY_PHASE_ID, hw_mode);
2702 qed_wr(p_hwfn, p_ptt, PSWRQ2_REG_L2P_VALIDATE_VFID, 0);
2703 qed_wr(p_hwfn, p_ptt, PGLUE_B_REG_USE_CLIENTID_IN_TAG, 1);
2705 if (QED_IS_BB(p_hwfn->cdev)) {
2706 num_pfs = NUM_OF_ENG_PFS(p_hwfn->cdev);
2708 qed_fid_pretend(p_hwfn, p_ptt, pf_id);
2709 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_ROCE, 0x0);
2710 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TCP, 0x0);
2713 qed_fid_pretend(p_hwfn, p_ptt, p_hwfn->rel_pf_id);
2718 concrete_fid = qed_vfid_to_concrete(p_hwfn, vf_id);
2719 qed_fid_pretend(p_hwfn, p_ptt, (u16)concrete_fid);
2720 qed_wr(p_hwfn, p_ptt, CCFC_REG_STRONG_ENABLE_VF, 0x1);
2721 qed_wr(p_hwfn, p_ptt, CCFC_REG_WEAK_ENABLE_VF, 0x0);
2722 qed_wr(p_hwfn, p_ptt, TCFC_REG_STRONG_ENABLE_VF, 0x1);
2723 qed_wr(p_hwfn, p_ptt, TCFC_REG_WEAK_ENABLE_VF, 0x0);
2726 qed_fid_pretend(p_hwfn, p_ptt, p_hwfn->rel_pf_id);
2735 qed_hw_init_dpi_size(struct qed_hwfn *p_hwfn,
2749 min_dpis = p_hwfn->pf_params.rdma_pf_params.min_dpis;
2752 p_hwfn->dpi_size = dpi_page_size;
2753 p_hwfn->dpi_count = dpi_count;
2755 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_DPI_BIT_SHIFT, dpi_bit_shift);
2769 bool qed_edpm_enabled(struct qed_hwfn *p_hwfn)
2771 if (p_hwfn->dcbx_no_edpm || p_hwfn->db_bar_no_edpm)
2778 qed_hw_init_pf_doorbell_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
2788 db_bar_size = qed_hw_bar_size(p_hwfn, p_ptt, BAR_ID_1);
2789 if (p_hwfn->cdev->num_hwfns > 1)
2793 non_pwm_conn = qed_cxt_get_proto_cid_start(p_hwfn, PROTOCOLID_CORE) +
2794 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_CORE,
2796 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH,
2804 DP_ERR(p_hwfn->cdev,
2811 DP_ERR(p_hwfn->cdev,
2819 roce_edpm_mode = p_hwfn->pf_params.rdma_pf_params.roce_edpm_mode;
2826 rc = qed_hw_init_dpi_size(p_hwfn, p_ptt, pwm_regsize, n_cpus);
2831 if (cond || p_hwfn->dcbx_no_edpm) {
2837 rc = qed_hw_init_dpi_size(p_hwfn, p_ptt, pwm_regsize, n_cpus);
2840 qed_rdma_dpm_bar(p_hwfn, p_ptt);
2843 p_hwfn->wid_count = (u16)n_cpus;
2845 DP_INFO(p_hwfn,
2849 p_hwfn->dpi_size,
2850 p_hwfn->dpi_count,
2851 (!qed_edpm_enabled(p_hwfn)) ?
2855 DP_ERR(p_hwfn,
2857 p_hwfn->dpi_count,
2858 p_hwfn->pf_params.rdma_pf_params.min_dpis);
2862 p_hwfn->dpi_start_offset = norm_regsize;
2866 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_ICID_BIT_SHIFT_NORM, pf_dems_shift);
2867 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_MIN_ADDR_REG1, min_addr_reg1);
2872 static int qed_hw_init_port(struct qed_hwfn *p_hwfn,
2878 if (!QED_IS_CMT(p_hwfn->cdev) || !IS_LEAD_HWFN(p_hwfn))
2879 STORE_RT_REG(p_hwfn, NIG_REG_BRB_GATE_DNTFWD_PORT_RT_OFFSET, 0);
2881 rc = qed_init_run(p_hwfn, p_ptt, PHASE_PORT, p_hwfn->port_id, hw_mode);
2885 qed_wr(p_hwfn, p_ptt, PGLUE_B_REG_MASTER_WRITE_PAD_ENABLE, 0);
2890 static int qed_hw_init_pf(struct qed_hwfn *p_hwfn,
2898 u8 rel_pf_id = p_hwfn->rel_pf_id;
2901 if (p_hwfn->mcp_info) {
2904 p_info = &p_hwfn->mcp_info->func_info;
2906 p_hwfn->qm_info.pf_wfq = p_info->bandwidth_min;
2909 p_hwfn->qm_info.pf_rl = 100000;
2912 qed_cxt_hw_init_pf(p_hwfn, p_ptt);
2914 qed_int_igu_init_rt(p_hwfn);
2918 DP_VERBOSE(p_hwfn, NETIF_MSG_HW, "Configuring LLH_FUNC_TAG\n");
2919 STORE_RT_REG(p_hwfn, NIG_REG_LLH_FUNC_TAG_EN_RT_OFFSET, 1);
2920 STORE_RT_REG(p_hwfn, NIG_REG_LLH_FUNC_TAG_VALUE_RT_OFFSET,
2921 p_hwfn->hw_info.ovlan);
2923 DP_VERBOSE(p_hwfn, NETIF_MSG_HW,
2925 STORE_RT_REG(p_hwfn, NIG_REG_LLH_FUNC_FILTER_HDR_SEL_RT_OFFSET,
2931 DP_VERBOSE(p_hwfn, NETIF_MSG_HW,
2933 STORE_RT_REG(p_hwfn,
2938 STORE_RT_REG(p_hwfn, PRS_REG_SEARCH_TCP_RT_OFFSET,
2939 ((p_hwfn->hw_info.personality == QED_PCI_ISCSI) ||
2940 (p_hwfn->hw_info.personality == QED_PCI_NVMETCP)) ? 1 : 0);
2941 STORE_RT_REG(p_hwfn, PRS_REG_SEARCH_FCOE_RT_OFFSET,
2942 (p_hwfn->hw_info.personality == QED_PCI_FCOE) ? 1 : 0);
2943 STORE_RT_REG(p_hwfn, PRS_REG_SEARCH_ROCE_RT_OFFSET, 0);
2946 rc = qed_dmae_sanity(p_hwfn, p_ptt, "pf_phase");
2951 rc = qed_init_run(p_hwfn, p_ptt, PHASE_PF, rel_pf_id, hw_mode);
2956 rc = qed_init_run(p_hwfn, p_ptt, PHASE_QM_PF, rel_pf_id, hw_mode);
2960 qed_fw_overlay_init_ram(p_hwfn, p_ptt, p_hwfn->fw_overlay_mem);
2963 qed_int_igu_init_pure_rt(p_hwfn, p_ptt, true, true);
2965 rc = qed_hw_init_pf_doorbell_bar(p_hwfn, p_ptt);
2970 if (IS_LEAD_HWFN(p_hwfn)) {
2971 rc = qed_llh_hw_init_pf(p_hwfn, p_ptt);
2978 qed_int_igu_enable(p_hwfn, p_ptt, int_mode);
2981 rc = qed_sp_pf_start(p_hwfn, p_ptt, p_tunn,
2984 DP_NOTICE(p_hwfn, "Function start ramrod failed\n");
2987 if (p_hwfn->hw_info.personality == QED_PCI_FCOE) {
2988 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TAG1, BIT(2));
2989 qed_wr(p_hwfn, p_ptt,
2997 int qed_pglueb_set_pfid_enable(struct qed_hwfn *p_hwfn,
3003 qed_wr(p_hwfn, p_ptt, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, set_val);
3007 val = qed_rd(p_hwfn, p_ptt,
3016 DP_NOTICE(p_hwfn,
3024 static void qed_reset_mb_shadow(struct qed_hwfn *p_hwfn,
3028 qed_mcp_read_mb(p_hwfn, p_main_ptt);
3029 memcpy(p_hwfn->mcp_info->mfw_mb_shadow,
3030 p_hwfn->mcp_info->mfw_mb_cur, p_hwfn->mcp_info->mfw_mb_length);
3046 static int qed_vf_start(struct qed_hwfn *p_hwfn,
3051 qed_vf_pf_tunnel_param_update(p_hwfn, p_params->p_tunn);
3054 p_hwfn->b_int_enabled = true;
3059 static void qed_pglueb_clear_err(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
3061 qed_wr(p_hwfn, p_ptt, PGLUE_B_REG_WAS_ERROR_PF_31_0_CLR,
3062 BIT(p_hwfn->abs_pf_id));
3070 struct qed_hwfn *p_hwfn;
3088 p_hwfn = &cdev->hwfns[i];
3091 if (!p_hwfn->hw_info.mtu) {
3092 p_hwfn->hw_info.mtu = 1500;
3097 qed_vf_start(p_hwfn, p_params);
3102 p_hwfn->mcp_info->mcp_handling_status = 0;
3104 rc = qed_calc_hw_mode(p_hwfn);
3116 STORE_RT_REG(p_hwfn, PRS_REG_TAG_ETHERTYPE_0_RT_OFFSET,
3118 STORE_RT_REG(p_hwfn, NIG_REG_TAG_ETHERTYPE_0_RT_OFFSET,
3120 STORE_RT_REG(p_hwfn, PBF_REG_TAG_ETHERTYPE_0_RT_OFFSET,
3122 STORE_RT_REG(p_hwfn, DORQ_REG_TAG1_ETHERTYPE_RT_OFFSET,
3128 rc = qed_mcp_load_req(p_hwfn, p_hwfn->p_main_ptt,
3131 DP_NOTICE(p_hwfn, "Failed sending a LOAD_REQ command\n");
3136 DP_VERBOSE(p_hwfn, QED_MSG_SP,
3145 qed_mcp_set_capabilities(p_hwfn, p_hwfn->p_main_ptt);
3147 qed_reset_mb_shadow(p_hwfn, p_hwfn->p_main_ptt);
3154 rc = qed_final_cleanup(p_hwfn, p_hwfn->p_main_ptt,
3155 p_hwfn->rel_pf_id, false);
3157 qed_hw_err_notify(p_hwfn, p_hwfn->p_main_ptt,
3165 qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_main_ptt, true);
3168 rc = qed_pglueb_set_pfid_enable(p_hwfn, p_hwfn->p_main_ptt,
3178 qed_pglueb_clear_err(p_hwfn, p_hwfn->p_main_ptt);
3182 p_hwfn->fw_overlay_mem =
3183 qed_fw_overlay_mem_alloc(p_hwfn, fw_overlays,
3185 if (!p_hwfn->fw_overlay_mem) {
3186 DP_NOTICE(p_hwfn,
3194 rc = qed_hw_init_common(p_hwfn, p_hwfn->p_main_ptt,
3195 p_hwfn->hw_info.hw_mode);
3200 rc = qed_hw_init_port(p_hwfn, p_hwfn->p_main_ptt,
3201 p_hwfn->hw_info.hw_mode);
3207 rc = qed_hw_init_pf(p_hwfn, p_hwfn->p_main_ptt,
3209 p_hwfn->hw_info.hw_mode,
3215 DP_NOTICE(p_hwfn,
3222 DP_NOTICE(p_hwfn,
3228 rc = qed_mcp_load_done(p_hwfn, p_hwfn->p_main_ptt);
3233 DP_VERBOSE(p_hwfn,
3236 rc = qed_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
3241 DP_NOTICE(p_hwfn,
3246 p_hwfn->hw_init_done = true;
3250 p_hwfn = QED_LEADING_HWFN(cdev);
3253 DP_VERBOSE(p_hwfn,
3257 rc = qed_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
3261 DP_NOTICE(p_hwfn,
3265 rc = qed_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
3269 DP_INFO(p_hwfn, "Failed to update firmware version\n");
3272 rc = qed_mcp_ov_update_mtu(p_hwfn, p_hwfn->p_main_ptt,
3273 p_hwfn->hw_info.mtu);
3275 DP_INFO(p_hwfn,
3279 rc = qed_mcp_ov_update_driver_state(p_hwfn,
3280 p_hwfn->p_main_ptt,
3283 DP_INFO(p_hwfn, "Failed to update driver state\n");
3285 rc = qed_mcp_ov_update_eswitch(p_hwfn, p_hwfn->p_main_ptt,
3288 DP_INFO(p_hwfn, "Failed to update eswitch mode\n");
3296 qed_mcp_load_done(p_hwfn, p_hwfn->p_main_ptt);
3302 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
3307 qed_wr(p_hwfn, p_ptt, TM_REG_PF_ENABLE_CONN, 0x0);
3308 qed_wr(p_hwfn, p_ptt, TM_REG_PF_ENABLE_TASK, 0x0);
3314 if ((!qed_rd(p_hwfn, p_ptt,
3316 (!qed_rd(p_hwfn, p_ptt, TM_REG_PF_SCAN_ACTIVE_TASK)))
3328 DP_NOTICE(p_hwfn,
3330 (u8)qed_rd(p_hwfn, p_ptt, TM_REG_PF_SCAN_ACTIVE_CONN),
3331 (u8)qed_rd(p_hwfn, p_ptt, TM_REG_PF_SCAN_ACTIVE_TASK));
3339 struct qed_hwfn *p_hwfn = &cdev->hwfns[j];
3340 struct qed_ptt *p_ptt = p_hwfn->p_main_ptt;
3342 qed_hw_timers_stop(cdev, p_hwfn, p_ptt);
3348 struct qed_hwfn *p_hwfn;
3354 p_hwfn = &cdev->hwfns[j];
3355 p_ptt = p_hwfn->p_main_ptt;
3357 DP_VERBOSE(p_hwfn, NETIF_MSG_IFDOWN, "Stopping hw/fw\n");
3360 qed_vf_pf_int_cleanup(p_hwfn);
3361 rc = qed_vf_pf_reset(p_hwfn);
3363 DP_NOTICE(p_hwfn,
3372 p_hwfn->hw_init_done = false;
3376 rc = qed_mcp_unload_req(p_hwfn, p_ptt);
3378 DP_NOTICE(p_hwfn,
3385 qed_slowpath_irq_sync(p_hwfn);
3390 rc = qed_sp_pf_stop(p_hwfn);
3392 DP_NOTICE(p_hwfn,
3398 qed_wr(p_hwfn, p_ptt,
3401 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TCP, 0x0);
3402 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_UDP, 0x0);
3403 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_FCOE, 0x0);
3404 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_ROCE, 0x0);
3405 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_OPENFLOW, 0x0);
3407 qed_hw_timers_stop(cdev, p_hwfn, p_ptt);
3410 qed_int_igu_disable_int(p_hwfn, p_ptt);
3412 qed_wr(p_hwfn, p_ptt, IGU_REG_LEADING_EDGE_LATCH, 0);
3413 qed_wr(p_hwfn, p_ptt, IGU_REG_TRAILING_EDGE_LATCH, 0);
3415 qed_int_igu_init_pure_rt(p_hwfn, p_ptt, false, true);
3421 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_DB_ENABLE, 0);
3422 qed_wr(p_hwfn, p_ptt, QM_REG_PF_EN, 0);
3424 if (IS_LEAD_HWFN(p_hwfn) &&
3426 !QED_IS_FCOE_PERSONALITY(p_hwfn))
3428 p_hwfn->hw_info.hw_mac_addr);
3431 rc = qed_mcp_unload_done(p_hwfn, p_ptt);
3433 DP_NOTICE(p_hwfn,
3442 p_hwfn = QED_LEADING_HWFN(cdev);
3450 rc = qed_pglueb_set_pfid_enable(p_hwfn, p_ptt, false);
3452 DP_NOTICE(p_hwfn,
3467 struct qed_hwfn *p_hwfn = &cdev->hwfns[j];
3471 qed_vf_pf_int_cleanup(p_hwfn);
3474 p_ptt = qed_ptt_acquire(p_hwfn);
3478 DP_VERBOSE(p_hwfn,
3481 qed_wr(p_hwfn, p_ptt,
3484 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TCP, 0x0);
3485 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_UDP, 0x0);
3486 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_FCOE, 0x0);
3487 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_ROCE, 0x0);
3488 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_OPENFLOW, 0x0);
3490 qed_int_igu_init_pure_rt(p_hwfn, p_ptt, false, false);
3494 qed_ptt_release(p_hwfn, p_ptt);
3500 int qed_hw_start_fastpath(struct qed_hwfn *p_hwfn)
3504 if (IS_VF(p_hwfn->cdev))
3507 p_ptt = qed_ptt_acquire(p_hwfn);
3511 if (p_hwfn->p_rdma_info &&
3512 p_hwfn->p_rdma_info->active && p_hwfn->b_rdma_enabled_in_prs)
3513 qed_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 0x1);
3516 qed_wr(p_hwfn, p_ptt, NIG_REG_RX_LLH_BRB_GATE_DNTFWD_PERPF, 0x0);
3517 qed_ptt_release(p_hwfn, p_ptt);
3523 static void qed_hw_hwfn_free(struct qed_hwfn *p_hwfn)
3525 qed_ptt_pool_free(p_hwfn);
3526 kfree(p_hwfn->hw_info.p_igu_info);
3527 p_hwfn->hw_info.p_igu_info = NULL;
3531 static void qed_hw_hwfn_prepare(struct qed_hwfn *p_hwfn)
3534 if (QED_IS_AH(p_hwfn->cdev)) {
3535 qed_wr(p_hwfn, p_hwfn->p_main_ptt,
3537 qed_wr(p_hwfn, p_hwfn->p_main_ptt,
3539 qed_wr(p_hwfn, p_hwfn->p_main_ptt,
3541 qed_wr(p_hwfn, p_hwfn->p_main_ptt,
3544 qed_wr(p_hwfn, p_hwfn->p_main_ptt,
3546 qed_wr(p_hwfn, p_hwfn->p_main_ptt,
3548 qed_wr(p_hwfn, p_hwfn->p_main_ptt,
3550 qed_wr(p_hwfn, p_hwfn->p_main_ptt,
3555 qed_pglueb_clear_err(p_hwfn, p_hwfn->p_main_ptt);
3558 qed_wr(p_hwfn, p_hwfn->p_main_ptt,
3562 static void get_function_id(struct qed_hwfn *p_hwfn)
3565 p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn,
3568 p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, PXP_PF_ME_CONCRETE_ADDR);
3570 p_hwfn->abs_pf_id = (p_hwfn->hw_info.concrete_fid >> 16) & 0xf;
3571 p_hwfn->rel_pf_id = GET_FIELD(p_hwfn->hw_info.concrete_fid,
3573 p_hwfn->port_id = GET_FIELD(p_hwfn->hw_info.concrete_fid,
3576 DP_VERBOSE(p_hwfn, NETIF_MSG_PROBE,
3578 p_hwfn->hw_info.concrete_fid, p_hwfn->hw_info.opaque_fid);
3581 static void qed_hw_set_feat(struct qed_hwfn *p_hwfn)
3583 u32 *feat_num = p_hwfn->hw_info.feat_num;
3588 qed_int_get_num_sbs(p_hwfn, &sb_cnt);
3591 QED_IS_RDMA_PERSONALITY(p_hwfn)) {
3598 RESC_NUM(p_hwfn, QED_RDMA_CNQ_RAM));
3602 if (QED_IS_L2_PERSONALITY(p_hwfn)) {
3605 RESC_NUM(p_hwfn, QED_L2_QUEUE),
3609 RESC_NUM(p_hwfn,
3611 FEAT_NUM(p_hwfn,
3615 if (QED_IS_FCOE_PERSONALITY(p_hwfn))
3617 RESC_NUM(p_hwfn,
3620 if (QED_IS_ISCSI_PERSONALITY(p_hwfn))
3622 RESC_NUM(p_hwfn,
3625 if (QED_IS_NVMETCP_PERSONALITY(p_hwfn))
3627 RESC_NUM(p_hwfn,
3630 DP_VERBOSE(p_hwfn,
3633 (int)FEAT_NUM(p_hwfn, QED_PF_L2_QUE),
3634 (int)FEAT_NUM(p_hwfn, QED_VF_L2_QUE),
3635 (int)FEAT_NUM(p_hwfn, QED_RDMA_CNQ),
3636 (int)FEAT_NUM(p_hwfn, QED_FCOE_CQ),
3637 (int)FEAT_NUM(p_hwfn, QED_ISCSI_CQ),
3638 (int)FEAT_NUM(p_hwfn, QED_NVMETCP_CQ),
3681 __qed_hw_set_soft_resc_size(struct qed_hwfn *p_hwfn,
3688 rc = qed_mcp_set_resc_max_val(p_hwfn, p_ptt, res_id,
3691 DP_NOTICE(p_hwfn,
3698 DP_INFO(p_hwfn,
3734 qed_hw_set_soft_resc_size(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
3756 NUM_OF_RDMA_STATISTIC_COUNTERS(p_hwfn->cdev);
3765 rc = __qed_hw_set_soft_resc_size(p_hwfn, p_ptt, res_id,
3784 int qed_hw_get_dflt_resc(struct qed_hwfn *p_hwfn,
3788 u8 num_funcs = p_hwfn->num_funcs_on_engine;
3789 struct qed_dev *cdev = p_hwfn->cdev;
3831 if (p_hwfn->hw_info.personality != QED_PCI_ISCSI &&
3832 p_hwfn->hw_info.personality != QED_PCI_FCOE &&
3833 p_hwfn->hw_info.personality != QED_PCI_NVMETCP)
3852 else if (p_hwfn->cdev->num_ports_in_engine == 4)
3853 *p_resc_start = p_hwfn->port_id;
3854 else if (p_hwfn->hw_info.personality == QED_PCI_ISCSI ||
3855 p_hwfn->hw_info.personality == QED_PCI_NVMETCP)
3856 *p_resc_start = p_hwfn->port_id;
3857 else if (p_hwfn->hw_info.personality == QED_PCI_FCOE)
3858 *p_resc_start = p_hwfn->port_id + 2;
3861 *p_resc_start = *p_resc_num * p_hwfn->enabled_func_idx;
3868 static int __qed_hw_set_resc_info(struct qed_hwfn *p_hwfn,
3875 p_resc_num = &RESC_NUM(p_hwfn, res_id);
3876 p_resc_start = &RESC_START(p_hwfn, res_id);
3878 rc = qed_hw_get_dflt_resc(p_hwfn, res_id, &dflt_resc_num,
3881 DP_ERR(p_hwfn,
3887 rc = qed_mcp_get_resc_info(p_hwfn, p_hwfn->p_main_ptt, res_id,
3890 DP_NOTICE(p_hwfn,
3902 DP_INFO(p_hwfn,
3917 DP_INFO(p_hwfn,
3929 static int qed_hw_set_resc_info(struct qed_hwfn *p_hwfn)
3935 rc = __qed_hw_set_resc_info(p_hwfn, res_id);
3943 static int qed_hw_get_ppfid_bitmap(struct qed_hwfn *p_hwfn,
3946 struct qed_dev *cdev = p_hwfn->cdev;
3952 native_ppfid_idx = p_hwfn->rel_pf_id;
3954 native_ppfid_idx = p_hwfn->rel_pf_id /
3957 rc = qed_mcp_get_ppfid_bitmap(p_hwfn, p_ptt);
3964 DP_INFO(p_hwfn,
3973 static int qed_hw_get_resc(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
3977 bool b_ah = QED_IS_AH(p_hwfn->cdev);
3992 rc = qed_mcp_resc_lock(p_hwfn, p_ptt, &resc_lock_params);
3996 DP_INFO(p_hwfn,
3999 DP_NOTICE(p_hwfn,
4003 rc = qed_hw_set_soft_resc_size(p_hwfn, p_ptt);
4005 DP_NOTICE(p_hwfn,
4009 DP_INFO(p_hwfn,
4011 rc = qed_mcp_resc_unlock(p_hwfn, p_ptt,
4014 DP_INFO(p_hwfn,
4019 rc = qed_hw_set_resc_info(p_hwfn);
4024 rc = qed_mcp_resc_unlock(p_hwfn, p_ptt, &resc_unlock_params);
4026 DP_INFO(p_hwfn,
4031 if (IS_LEAD_HWFN(p_hwfn)) {
4032 rc = qed_hw_get_ppfid_bitmap(p_hwfn, p_ptt);
4038 if ((b_ah && (RESC_END(p_hwfn, QED_ILT) > PXP_NUM_ILT_RECORDS_K2)) ||
4039 (!b_ah && (RESC_END(p_hwfn, QED_ILT) > PXP_NUM_ILT_RECORDS_BB))) {
4040 DP_NOTICE(p_hwfn, "Can't assign ILT pages [%08x,...,%08x]\n",
4041 RESC_START(p_hwfn, QED_ILT),
4042 RESC_END(p_hwfn, QED_ILT) - 1);
4047 if (qed_int_igu_reset_cam(p_hwfn, p_ptt))
4050 qed_hw_set_feat(p_hwfn);
4053 DP_VERBOSE(p_hwfn, NETIF_MSG_PROBE, "%s = %d start = %d\n",
4055 RESC_NUM(p_hwfn, res_id),
4056 RESC_START(p_hwfn, res_id));
4062 qed_mcp_resc_unlock(p_hwfn, p_ptt, &resc_unlock_params);
4066 static int qed_hw_get_nvm_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
4076 nvm_cfg_addr = qed_rd(p_hwfn, p_ptt, MISC_REG_GEN_PURP_CR0);
4080 DP_NOTICE(p_hwfn, "Shared memory not initialized\n");
4085 nvm_cfg1_offset = qed_rd(p_hwfn, p_ptt, nvm_cfg_addr + 4);
4091 core_cfg = qed_rd(p_hwfn, p_ptt, addr);
4113 DP_NOTICE(p_hwfn, "Unknown port mode in 0x%08x\n", core_cfg);
4118 link = &p_hwfn->mcp_info->link_input;
4119 p_caps = &p_hwfn->mcp_info->link_capabilities;
4121 offsetof(struct nvm_cfg1, port[MFW_PORT(p_hwfn)]);
4122 link_temp = qed_rd(p_hwfn, p_ptt,
4130 link_temp = qed_rd(p_hwfn, p_ptt,
4160 DP_NOTICE(p_hwfn, "Unknown Speed in 0x%08x\n", link_temp);
4171 if (p_hwfn->mcp_info->capabilities &
4188 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
4197 if (p_hwfn->mcp_info->capabilities & FW_MB_PARAM_FEATURE_SUPPORT_EEE) {
4198 link_temp = qed_rd(p_hwfn, p_ptt, port_cfg_addr +
4228 if (p_hwfn->mcp_info->capabilities &
4232 link_temp = qed_rd(p_hwfn, p_ptt,
4295 link_temp = qed_rd(p_hwfn, p_ptt,
4306 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
4313 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
4320 if (IS_LEAD_HWFN(p_hwfn)) {
4321 struct qed_dev *cdev = p_hwfn->cdev;
4328 generic_cont0 = qed_rd(p_hwfn, p_ptt, addr);
4361 if (QED_IS_BB(p_hwfn->cdev))
4366 DP_INFO(p_hwfn, "Multi function mode is 0x%lx\n",
4378 DP_INFO(p_hwfn, "Multi function mode is 0x%lx\n",
4379 p_hwfn->cdev->mf_bits);
4386 device_capabilities = qed_rd(p_hwfn, p_ptt, addr);
4389 &p_hwfn->hw_info.device_capabilities);
4392 &p_hwfn->hw_info.device_capabilities);
4395 &p_hwfn->hw_info.device_capabilities);
4398 &p_hwfn->hw_info.device_capabilities);
4406 p_hwfn->hw_info.part_num[i] = qed_rd(p_hwfn, p_ptt, addr + i * 4);
4408 return qed_mcp_fill_shmem_func_info(p_hwfn, p_ptt);
4411 static void qed_get_num_funcs(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
4413 u8 num_funcs, enabled_func_idx = p_hwfn->rel_pf_id;
4415 struct qed_dev *cdev = p_hwfn->cdev;
4427 reg_function_hide = qed_rd(p_hwfn, p_ptt, MISCS_REG_FUNCTION_HIDE);
4431 if (QED_PATH_ID(p_hwfn) && cdev->num_hwfns == 1) {
4452 low_pfs_mask = (0x1 << p_hwfn->abs_pf_id) - 1;
4461 p_hwfn->num_funcs_on_engine = num_funcs;
4462 p_hwfn->enabled_func_idx = enabled_func_idx;
4464 DP_VERBOSE(p_hwfn,
4467 p_hwfn->rel_pf_id,
4468 p_hwfn->abs_pf_id,
4469 p_hwfn->enabled_func_idx, p_hwfn->num_funcs_on_engine);
4472 static void qed_hw_info_port_num(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
4475 struct qed_dev *cdev = p_hwfn->cdev;
4485 port_mode = qed_rd(p_hwfn, p_ptt, MISC_REG_PORT_MODE);
4497 DP_NOTICE(p_hwfn, "Unknown port mode 0x%08x\n", port_mode);
4503 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
4505 global_offsize = qed_rd(p_hwfn, p_ptt, addr);
4508 cdev->num_ports = (u8)qed_rd(p_hwfn, p_ptt, addr);
4511 static void qed_get_eee_caps(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
4516 p_caps = &p_hwfn->mcp_info->link_capabilities;
4521 eee_status = qed_rd(p_hwfn, p_ptt, p_hwfn->mcp_info->port_addr +
4533 qed_get_hw_info(struct qed_hwfn *p_hwfn,
4540 if (IS_LEAD_HWFN(p_hwfn)) {
4541 rc = qed_iov_hw_info(p_hwfn);
4546 if (IS_LEAD_HWFN(p_hwfn))
4547 qed_hw_info_port_num(p_hwfn, p_ptt);
4549 qed_mcp_get_capabilities(p_hwfn, p_ptt);
4551 qed_hw_get_nvm_info(p_hwfn, p_ptt);
4553 rc = qed_int_igu_read_cam(p_hwfn, p_ptt);
4557 if (qed_mcp_is_init(p_hwfn))
4558 ether_addr_copy(p_hwfn->hw_info.hw_mac_addr,
4559 p_hwfn->mcp_info->func_info.mac);
4561 eth_random_addr(p_hwfn->hw_info.hw_mac_addr);
4563 if (qed_mcp_is_init(p_hwfn)) {
4564 if (p_hwfn->mcp_info->func_info.ovlan != QED_MCP_VLAN_UNSET)
4565 p_hwfn->hw_info.ovlan =
4566 p_hwfn->mcp_info->func_info.ovlan;
4568 qed_mcp_cmd_port_init(p_hwfn, p_ptt);
4570 qed_get_eee_caps(p_hwfn, p_ptt);
4572 qed_mcp_read_ufp_config(p_hwfn, p_ptt);
4575 if (qed_mcp_is_init(p_hwfn)) {
4578 protocol = p_hwfn->mcp_info->func_info.protocol;
4579 p_hwfn->hw_info.personality = protocol;
4582 if (QED_IS_ROCE_PERSONALITY(p_hwfn))
4583 p_hwfn->hw_info.multi_tc_roce_en = true;
4585 p_hwfn->hw_info.num_hw_tc = NUM_PHYS_TCS_4PORT_K2;
4586 p_hwfn->hw_info.num_active_tc = 1;
4588 qed_get_num_funcs(p_hwfn, p_ptt);
4590 if (qed_mcp_is_init(p_hwfn))
4591 p_hwfn->hw_info.mtu = p_hwfn->mcp_info->func_info.mtu;
4593 return qed_hw_get_resc(p_hwfn, p_ptt);
4596 static int qed_get_dev_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
4598 struct qed_dev *cdev = p_hwfn->cdev;
4616 DP_NOTICE(p_hwfn, "Unknown device id 0x%x\n", cdev->device_id);
4620 cdev->chip_num = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_CHIP_NUM);
4621 cdev->chip_rev = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_CHIP_REV);
4626 tmp = qed_rd(p_hwfn, p_ptt, MISCS_REG_CMT_ENABLED_FOR_PAIR);
4628 if (tmp & (1 << p_hwfn->rel_pf_id)) {
4635 cdev->chip_bond_id = qed_rd(p_hwfn, p_ptt,
4638 cdev->chip_metal = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_CHIP_METAL);
4652 static int qed_hw_prepare_single(struct qed_hwfn *p_hwfn,
4658 struct qed_dev *cdev = p_hwfn->cdev;
4662 p_hwfn->regview = p_regview;
4663 p_hwfn->doorbells = p_doorbells;
4664 p_hwfn->db_phys_addr = db_phys_addr;
4666 if (IS_VF(p_hwfn->cdev))
4667 return qed_vf_hw_prepare(p_hwfn);
4670 if (REG_RD(p_hwfn, PXP_PF_ME_OPAQUE_ADDR) == 0xffffffff) {
4671 DP_ERR(p_hwfn,
4676 get_function_id(p_hwfn);
4679 rc = qed_ptt_pool_alloc(p_hwfn);
4684 p_hwfn->p_main_ptt = qed_get_reserved_ptt(p_hwfn, RESERVED_PTT_MAIN);
4687 if (!p_hwfn->my_id) {
4688 rc = qed_get_dev_info(p_hwfn, p_hwfn->p_main_ptt);
4693 qed_hw_hwfn_prepare(p_hwfn);
4696 rc = qed_mcp_cmd_init(p_hwfn, p_hwfn->p_main_ptt);
4698 DP_NOTICE(p_hwfn, "Failed initializing mcp command\n");
4703 rc = qed_get_hw_info(p_hwfn, p_hwfn->p_main_ptt, personality);
4705 DP_NOTICE(p_hwfn, "Failed to get HW information\n");
4712 if (IS_LEAD_HWFN(p_hwfn) && !cdev->recov_in_prog) {
4713 rc = qed_mcp_initiate_pf_flr(p_hwfn, p_hwfn->p_main_ptt);
4715 DP_NOTICE(p_hwfn, "Failed to initiate PF FLR\n");
4719 if (IS_LEAD_HWFN(p_hwfn)) {
4720 rc = qed_mcp_nvm_info_populate(p_hwfn);
4722 DP_NOTICE(p_hwfn,
4729 rc = qed_init_alloc(p_hwfn);
4735 if (IS_LEAD_HWFN(p_hwfn))
4736 qed_mcp_nvm_info_free(p_hwfn);
4738 if (IS_LEAD_HWFN(p_hwfn))
4739 qed_iov_free_hw_info(p_hwfn->cdev);
4740 qed_mcp_free(p_hwfn);
4742 qed_hw_hwfn_free(p_hwfn);
4750 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
4758 rc = qed_hw_prepare_single(p_hwfn,
4766 personality = p_hwfn->hw_info.personality;
4775 offset = qed_hw_bar_size(p_hwfn, p_hwfn->p_main_ptt,
4779 offset = qed_hw_bar_size(p_hwfn, p_hwfn->p_main_ptt,
4796 qed_init_free(p_hwfn);
4797 qed_mcp_nvm_info_free(p_hwfn);
4798 qed_mcp_free(p_hwfn);
4799 qed_hw_hwfn_free(p_hwfn);
4809 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
4813 qed_mcp_ov_update_driver_state(p_hwfn, p_hwfn->p_main_ptt,
4817 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4820 qed_vf_pf_release(p_hwfn);
4824 qed_init_free(p_hwfn);
4825 qed_hw_hwfn_free(p_hwfn);
4826 qed_mcp_free(p_hwfn);
4831 qed_mcp_nvm_info_free(p_hwfn);
4834 int qed_fw_l2_queue(struct qed_hwfn *p_hwfn, u16 src_id, u16 *dst_id)
4836 if (src_id >= RESC_NUM(p_hwfn, QED_L2_QUEUE)) {
4839 min = (u16)RESC_START(p_hwfn, QED_L2_QUEUE);
4840 max = min + RESC_NUM(p_hwfn, QED_L2_QUEUE);
4841 DP_NOTICE(p_hwfn,
4848 *dst_id = RESC_START(p_hwfn, QED_L2_QUEUE) + src_id;
4853 int qed_fw_vport(struct qed_hwfn *p_hwfn, u8 src_id, u8 *dst_id)
4855 if (src_id >= RESC_NUM(p_hwfn, QED_VPORT)) {
4858 min = (u8)RESC_START(p_hwfn, QED_VPORT);
4859 max = min + RESC_NUM(p_hwfn, QED_VPORT);
4860 DP_NOTICE(p_hwfn,
4867 *dst_id = RESC_START(p_hwfn, QED_VPORT) + src_id;
4872 int qed_fw_rss_eng(struct qed_hwfn *p_hwfn, u8 src_id, u8 *dst_id)
4874 if (src_id >= RESC_NUM(p_hwfn, QED_RSS_ENG)) {
4877 min = (u8)RESC_START(p_hwfn, QED_RSS_ENG);
4878 max = min + RESC_NUM(p_hwfn, QED_RSS_ENG);
4879 DP_NOTICE(p_hwfn,
4886 *dst_id = RESC_START(p_hwfn, QED_RSS_ENG) + src_id;
4891 static int qed_set_coalesce(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
4897 if (p_hwfn->cdev->int_coalescing_mode != QED_COAL_MODE_ENABLE) {
4898 DP_NOTICE(p_hwfn, "Coalescing configuration not enabled\n");
4906 qed_memcpy_to(p_hwfn, p_ptt, hw_addr, p_eth_qzone, eth_qzone_size);
4914 struct qed_hwfn *p_hwfn;
4918 p_hwfn = p_cid->p_owner;
4920 if (IS_VF(p_hwfn->cdev))
4921 return qed_vf_pf_set_coalesce(p_hwfn, rx_coal, tx_coal, p_cid);
4923 p_ptt = qed_ptt_acquire(p_hwfn);
4928 rc = qed_set_rxq_coalesce(p_hwfn, p_ptt, rx_coal, p_cid);
4931 p_hwfn->cdev->rx_coalesce_usecs = rx_coal;
4935 rc = qed_set_txq_coalesce(p_hwfn, p_ptt, tx_coal, p_cid);
4938 p_hwfn->cdev->tx_coalesce_usecs = tx_coal;
4941 qed_ptt_release(p_hwfn, p_ptt);
4945 int qed_set_rxq_coalesce(struct qed_hwfn *p_hwfn,
4962 DP_ERR(p_hwfn, "Invalid coalesce value - %d\n", coalesce);
4967 rc = qed_int_set_timer_res(p_hwfn, p_ptt, timer_res,
4975 rc = qed_set_coalesce(p_hwfn, p_ptt, address, ð_qzone,
4984 int qed_set_txq_coalesce(struct qed_hwfn *p_hwfn,
5001 DP_ERR(p_hwfn, "Invalid coalesce value - %d\n", coalesce);
5006 rc = qed_int_set_timer_res(p_hwfn, p_ptt, timer_res,
5014 rc = qed_set_coalesce(p_hwfn, p_ptt, address, ð_qzone,
5024 static void qed_configure_wfq_for_all_vports(struct qed_hwfn *p_hwfn,
5031 vport_params = p_hwfn->qm_info.qm_vport_params;
5033 for (i = 0; i < p_hwfn->qm_info.num_vports; i++) {
5034 u32 wfq_speed = p_hwfn->qm_info.wfq_data[i].min_speed;
5038 qed_init_vport_wfq(p_hwfn, p_ptt,
5044 static void qed_init_wfq_default_param(struct qed_hwfn *p_hwfn,
5050 for (i = 0; i < p_hwfn->qm_info.num_vports; i++)
5051 p_hwfn->qm_info.qm_vport_params[i].wfq = 1;
5054 static void qed_disable_wfq_for_all_vports(struct qed_hwfn *p_hwfn,
5061 vport_params = p_hwfn->qm_info.qm_vport_params;
5063 for (i = 0; i < p_hwfn->qm_info.num_vports; i++) {
5064 qed_init_wfq_default_param(p_hwfn, min_pf_rate);
5065 qed_init_vport_wfq(p_hwfn, p_ptt,
5078 static int qed_init_wfq_param(struct qed_hwfn *p_hwfn,
5084 num_vports = p_hwfn->qm_info.num_vports;
5087 DP_NOTICE(p_hwfn, "Unexpected num_vports: %d\n", num_vports);
5096 p_hwfn->qm_info.wfq_data[i].configured) {
5098 tmp_speed = p_hwfn->qm_info.wfq_data[i].min_speed;
5109 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
5116 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
5123 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
5133 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
5139 p_hwfn->qm_info.wfq_data[vport_id].min_speed = req_rate;
5140 p_hwfn->qm_info.wfq_data[vport_id].configured = true;
5143 if (p_hwfn->qm_info.wfq_data[i].configured)
5146 p_hwfn->qm_info.wfq_data[i].min_speed = left_rate_per_vp;
5152 static int __qed_configure_vport_wfq(struct qed_hwfn *p_hwfn,
5158 p_link = &p_hwfn->cdev->hwfns[0].mcp_info->link_output;
5161 p_hwfn->qm_info.wfq_data[vp_id].min_speed = rate;
5162 p_hwfn->qm_info.wfq_data[vp_id].configured = true;
5166 rc = qed_init_wfq_param(p_hwfn, vp_id, rate, p_link->min_pf_rate);
5169 qed_configure_wfq_for_all_vports(p_hwfn, p_ptt,
5172 DP_NOTICE(p_hwfn,
5178 static int __qed_configure_vp_wfq_on_link_change(struct qed_hwfn *p_hwfn,
5187 for (i = 0; i < p_hwfn->qm_info.num_vports; i++) {
5190 if (!p_hwfn->qm_info.wfq_data[i].configured)
5193 rate = p_hwfn->qm_info.wfq_data[i].min_speed;
5196 rc = qed_init_wfq_param(p_hwfn, i, rate, min_pf_rate);
5198 DP_NOTICE(p_hwfn,
5205 qed_configure_wfq_for_all_vports(p_hwfn, p_ptt, min_pf_rate);
5207 qed_disable_wfq_for_all_vports(p_hwfn, p_ptt, min_pf_rate);
5228 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
5231 p_ptt = qed_ptt_acquire(p_hwfn);
5235 rc = __qed_configure_vport_wfq(p_hwfn, p_ptt, vp_id, rate);
5238 qed_ptt_release(p_hwfn, p_ptt);
5242 qed_ptt_release(p_hwfn, p_ptt);
5262 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
5264 __qed_configure_vp_wfq_on_link_change(p_hwfn, p_ptt,
5269 int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
5276 p_hwfn->mcp_info->func_info.bandwidth_max = max_bw;
5282 p_hwfn->qm_info.pf_rl = p_link->speed;
5289 p_hwfn->qm_info.pf_rl = 100000;
5291 rc = qed_init_pf_rl(p_hwfn, p_ptt, p_hwfn->rel_pf_id,
5292 p_hwfn->qm_info.pf_rl);
5294 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
5312 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
5319 p_ptt = qed_ptt_acquire(p_hwfn);
5323 rc = __qed_configure_pf_max_bandwidth(p_hwfn, p_ptt,
5326 qed_ptt_release(p_hwfn, p_ptt);
5335 int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
5342 p_hwfn->mcp_info->func_info.bandwidth_min = min_bw;
5343 p_hwfn->qm_info.pf_wfq = min_bw;
5350 rc = qed_init_pf_wfq(p_hwfn, p_ptt, p_hwfn->rel_pf_id, min_bw);
5352 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
5370 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
5377 p_ptt = qed_ptt_acquire(p_hwfn);
5381 rc = __qed_configure_pf_min_bandwidth(p_hwfn, p_ptt,
5384 qed_ptt_release(p_hwfn, p_ptt);
5391 rc = __qed_configure_vp_wfq_on_link_change(p_hwfn,
5396 qed_ptt_release(p_hwfn, p_ptt);
5402 void qed_clean_wfq_db(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
5406 p_link = &p_hwfn->mcp_info->link_output;
5409 qed_disable_wfq_for_all_vports(p_hwfn, p_ptt,
5412 memset(p_hwfn->qm_info.wfq_data, 0,
5413 sizeof(*p_hwfn->qm_info.wfq_data) * p_hwfn->qm_info.num_vports);
5451 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
5452 struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn);
5473 rc = qed_llh_remove_filter(p_hwfn, p_ptt,
5479 qed_ptt_release(p_hwfn, p_ptt);