ethernet/pasemi/pasemi_mac.c

274 				       offsetof(struct pasemi_mac_csring, chan));
281 	chno = ring->chan.chno;
287 	if (pasemi_dma_alloc_ring(&ring->chan, CS_RING_SIZE))
291 		      PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
292 	val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
319 	pasemi_dma_start_chan(&ring->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
332 	pasemi_dma_free_ring(&ring->chan);
334 	pasemi_dma_free_chan(&ring->chan);
356 	pasemi_dma_stop_chan(&csring->chan);
359 	pasemi_dma_free_ring(&csring->chan);
360 	pasemi_dma_free_chan(&csring->chan);
372 				     offsetof(struct pasemi_mac_rxring, chan));
378 	chno = ring->chan.chno;
391 	if (pasemi_dma_alloc_ring(&ring->chan, RX_RING_SIZE))
401 		      PAS_DMA_RXCHAN_BASEL_BRBL(ring->chan.ring_dma));
404 		      PAS_DMA_RXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32) |
440 	pasemi_dma_free_chan(&ring->chan);
455 				     offsetof(struct pasemi_mac_txring, chan));
462 	chno = ring->chan.chno;
474 	if (pasemi_dma_alloc_ring(&ring->chan, TX_RING_SIZE))
478 		      PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
479 	val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
503 	pasemi_dma_free_chan(&ring->chan);
539 	pasemi_dma_free_chan(&txring->chan);
572 	pasemi_dma_free_chan(&rx_ring(mac)->chan);
633 	pcnt = *rx->chan.status & PAS_STATUS_PCNT_M;
637 	if (*rx->chan.status & PAS_STATUS_TIMER)
640 	write_iob_reg(PAS_IOB_DMA_RXCH_RESET(mac->rx->chan.chno), reg);
648 	pcnt = *tx_ring(mac)->chan.status & PAS_STATUS_PCNT_M;
652 	write_iob_reg(PAS_IOB_DMA_TXCH_RESET(tx_ring(mac)->chan.chno), reg);
660 	struct pasemi_dmachan *chan = &rx_ring(mac)->chan;
666 	ccmdsta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(chan->chno));
669 		macrx, *chan->status);
679 	struct pasemi_dmachan *chan = &tx_ring(mac)->chan;
684 	cmdsta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(chan->chno));
687 		"tx status 0x%016llx\n", mactx, *chan->status);
695 	const struct pasemi_dmachan *chan = &rx->chan;
720 		    (*chan->status & PAS_STATUS_ERROR))
799 	write_dma_reg(PAS_DMA_RXCHAN_INCR(mac->rx->chan.chno), count << 1);
816 	struct pasemi_dmachan *chan = &txring->chan;
852 		    (*chan->status & PAS_STATUS_ERROR))
910 	const struct pasemi_dmachan *chan = &rxring->chan;
913 	if (!(*chan->status & PAS_STATUS_CAUSE_M))
921 	if (*chan->status & PAS_STATUS_SOFT)
923 	if (*chan->status & PAS_STATUS_ERROR)
928 	write_iob_reg(PAS_IOB_DMA_RXCH_RESET(chan->chno), reg);
950 	const struct pasemi_dmachan *chan = &txring->chan;
954 	if (!(*chan->status & PAS_STATUS_CAUSE_M))
959 	if (*chan->status & PAS_STATUS_SOFT)
961 	if (*chan->status & PAS_STATUS_ERROR)
969 		write_iob_reg(PAS_IOB_DMA_TXCH_RESET(chan->chno), reg);
1105 	write_iob_reg(PAS_IOB_DMA_RXCH_CFG(mac->rx->chan.chno),
1108 	write_iob_reg(PAS_IOB_DMA_TXCH_CFG(mac->tx->chan.chno),
1112 		      PAS_MAC_IPC_CHNL_DCHNO(mac->rx->chan.chno) |
1113 		      PAS_MAC_IPC_CHNL_BCH(mac->rx->chan.chno));
1124 	pasemi_dma_start_chan(&rx_ring(mac)->chan, PAS_DMA_RXCHAN_CCMDSTA_DU |
1130 	pasemi_dma_start_chan(&tx_ring(mac)->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
1137 	write_dma_reg(PAS_DMA_RXCHAN_INCR(rx_ring(mac)->chan.chno),
1173 	ret = request_irq(mac->tx->chan.irq, pasemi_mac_tx_intr, 0,
1177 			mac->tx->chan.irq, ret);
1184 	ret = request_irq(mac->rx->chan.irq, pasemi_mac_rx_intr, 0,
1188 			mac->rx->chan.irq, ret);
1201 	free_irq(mac->tx->chan.irq, mac->tx);
1219 	int txch = tx_ring(mac)->chan.chno;
1241 	int rxch = rx_ring(mac)->chan.chno;
1283 	rxch = rx_ring(mac)->chan.chno;
1284 	txch = tx_ring(mac)->chan.chno;
1323 	free_irq(mac->tx->chan.irq, mac->tx);
1324 	free_irq(mac->rx->chan.irq, mac->rx);
1380 	csdma = csring->chan.ring_dma + (fill & (CS_RING_SIZE-1)) * 8 + 2;
1411 	write_dma_reg(PAS_DMA_TXCHAN_INCR(csring->chan.chno), (cs_size) >> 1);
1423 	write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), 2);
1529 	write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), (nfrags+2) >> 1);
1587 	disable_irq(mac->tx->chan.irq);
1588 	pasemi_mac_tx_intr(mac->tx->chan.irq, mac->tx);
1589 	enable_irq(mac->tx->chan.irq);
1591 	disable_irq(mac->rx->chan.irq);
1592 	pasemi_mac_rx_intr(mac->rx->chan.irq, mac->rx);
1593 	enable_irq(mac->rx->chan.irq);
1808 	pasemi_dma_free_chan(&mac->tx->chan);
1809 	pasemi_dma_free_chan(&mac->rx->chan);