Lines Matching refs:ocelot_port

268 		struct ocelot_port *ocelot_port = ocelot->ports[port];
270 if (!ocelot_port || !ocelot_port->bridge ||
271 !br_vlan_enabled(ocelot_port->bridge))
275 bridge = ocelot_port->bridge;
279 if (bridge == ocelot_port->bridge)
386 struct ocelot_port *ocelot_port = ocelot->ports[port];
390 if (ocelot_port->vlan_aware) {
429 struct ocelot_port *ocelot_port = ocelot->ports[port];
431 if (ocelot_port && ocelot_port->bridge == bridge)
432 return ocelot_port->bridge_num;
460 struct ocelot_port *ocelot_port = ocelot->ports[port];
461 u16 pvid = ocelot_vlan_unaware_pvid(ocelot, ocelot_port->bridge);
464 ocelot_port->pvid_vlan = pvid_vlan;
466 if (ocelot_port->vlan_aware && pvid_vlan)
479 if (!pvid_vlan && ocelot_port->vlan_aware)
595 struct ocelot_port *ocelot_port = ocelot->ports[port];
615 ocelot_port->bridge);
616 else if (ocelot_port->bridge)
618 ocelot_port->bridge);
622 ocelot_port->vlan_aware = vlan_aware;
634 ocelot_port_set_pvid(ocelot, port, ocelot_port->pvid_vlan);
700 struct ocelot_port *ocelot_port = ocelot->ports[port];
707 if (ocelot_port->pvid_vlan && ocelot_port->pvid_vlan->vid == vid)
817 struct ocelot_port *ocelot_port = ocelot->ports[port];
822 if (ocelot_port->phy_mode == PHY_INTERFACE_MODE_QSGMII)
823 ocelot_port_rmwl(ocelot_port, 0,
828 if (ocelot_port->phy_mode != PHY_INTERFACE_MODE_INTERNAL) {
840 ocelot_port->phy_mode);
857 struct ocelot_port *ocelot_port = ocelot->ports[port];
860 ocelot_port_writel(ocelot_port, DEV_PORT_MISC_HDX_FAST_DIS,
864 ocelot_port_writel(ocelot_port, PCS1G_MODE_CFG_SGMII_MODE_ENA,
866 ocelot_port_writel(ocelot_port, PCS1G_SD_CFG_SD_SEL, PCS1G_SD_CFG);
869 ocelot_port_writel(ocelot_port, PCS1G_CFG_PCS_ENA, PCS1G_CFG);
872 ocelot_port_writel(ocelot_port, 0, PCS1G_ANEG_CFG);
875 ocelot_port_writel(ocelot_port, 0, PCS1G_LB_CFG);
884 struct ocelot_port *ocelot_port = ocelot->ports[port];
887 ocelot_port->speed = SPEED_UNKNOWN;
889 ocelot_port_rmwl(ocelot_port, 0, DEV_MAC_ENA_CFG_RX_ENA,
908 ocelot_port_rmwl(ocelot_port,
925 struct ocelot_port *ocelot_port = ocelot->ports[port];
929 ocelot_port->speed = speed;
952 ocelot_port_writel(ocelot_port, mode, DEV_MAC_MODE_CFG);
957 ocelot_port_writel(ocelot_port, DEV_CLOCK_CFG_LINK_SPEED(mac_speed),
1001 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA |
1482 struct ocelot_port *ocelot_port = ocelot->ports[port];
1484 if (!ocelot_port)
1487 if (ocelot_port->bond == bond)
1519 struct ocelot_port *cpu)
1525 struct ocelot_port *ocelot_port = ocelot->ports[port];
1527 if (!ocelot_port)
1530 if (ocelot_port->dsa_8021q_cpu == cpu)
1545 struct ocelot_port *ocelot_port = ocelot->ports[port];
1546 struct ocelot_port *cpu_port = ocelot_port->dsa_8021q_cpu;
1560 struct ocelot_port *ocelot_port = ocelot->ports[src_port];
1565 if (!ocelot_port || ocelot_port->stp_state != BR_STATE_FORWARDING)
1568 bridge = ocelot_port->bridge;
1573 ocelot_port = ocelot->ports[port];
1575 if (!ocelot_port)
1578 if (ocelot_port->stp_state == BR_STATE_FORWARDING &&
1579 ocelot_port->bridge == bridge)
1604 struct ocelot_port *ocelot_port = ocelot->ports[port];
1607 if (!ocelot_port) {
1610 } else if (ocelot_port->is_dsa_8021q_cpu) {
1615 ocelot_port);
1616 } else if (ocelot_port->bridge) {
1617 struct net_device *bond = ocelot_port->bond;
1663 struct ocelot_port *ocelot_port = ocelot->ports[port];
1665 if (!ocelot_port || !ocelot_port->is_dsa_8021q_cpu)
1679 struct ocelot_port *cpu_port = ocelot->ports[cpu];
1697 struct ocelot_port *cpu_port = ocelot->ports[cpu];
1716 struct ocelot_port *cpu_port = ocelot->ports[cpu];
1740 struct ocelot_port *ocelot_port = ocelot->ports[port];
1745 ocelot_port->stp_state = state;
1748 ocelot_port->learn_ena)
1987 struct ocelot_port *ocelot_port = ocelot->ports[port];
1996 ocelot_port->bridge = bridge;
1997 ocelot_port->bridge_num = bridge_num;
2013 struct ocelot_port *ocelot_port = ocelot->ports[port];
2020 ocelot_port->bridge = NULL;
2021 ocelot_port->bridge_num = -1;
2053 struct ocelot_port *ocelot_port = ocelot->ports[port];
2055 if (!ocelot_port || !ocelot_port->bond)
2074 struct ocelot_port *ocelot_port = ocelot->ports[port];
2080 if (ocelot_port->lag_tx_active)
2101 struct ocelot_port *ocelot_port = ocelot->ports[port];
2103 if (!ocelot_port)
2106 if (ocelot_port->bond == bond)
2122 struct ocelot_port *ocelot_port = ocelot->ports[port];
2125 if (!ocelot_port)
2128 bond = ocelot_port->bond;
2297 struct ocelot_port *ocelot_port = ocelot->ports[port];
2301 ocelot_port->lag_tx_active = lag_tx_active;
2384 struct ocelot_port *ocelot_port = ocelot->ports[port];
2398 ocelot_port_writel(ocelot_port, maxlen, DEV_MAC_MAXLEN_CFG);
2437 struct ocelot_port *ocelot_port = ocelot->ports[port];
2446 ocelot_port->learn_ena = enabled;
2762 struct ocelot_port *ocelot_port = ocelot->ports[port];
2764 skb_queue_head_init(&ocelot_port->tx_skbs);
2772 ocelot_port_writel(ocelot_port, DEV_MAC_IFG_CFG_TX_IFG(5),
2776 ocelot_port_writel(ocelot_port, DEV_MAC_HDX_CFG_LATE_COL_POS(67) |
2780 ocelot_port_writel(ocelot_port, DEV_MAC_HDX_CFG_LATE_COL_POS(67),
2785 ocelot_port_writel(ocelot_port, DEV_MAC_TAGS_CFG_TAG_ID(ETH_P_8021AD) |
2792 ocelot_port_writel(ocelot_port, 0, DEV_MAC_FC_MAC_HIGH_CFG);
2793 ocelot_port_writel(ocelot_port, 0, DEV_MAC_FC_MAC_LOW_CFG);
3075 struct ocelot_port *ocelot_port = ocelot->ports[port];
3077 skb_queue_purge(&ocelot_port->tx_skbs);