mellanox/mlxsw/spectrum.c

587 				u16 local_port, char *pmlp_pl,
597 	module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
598 	slot_index = mlxsw_reg_pmlp_slot_index_get(pmlp_pl, 0);
599 	width = mlxsw_reg_pmlp_width_get(pmlp_pl);
600 	separate_rxtx = mlxsw_reg_pmlp_rxtx_get(pmlp_pl);
601 	first_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
610 		if (mlxsw_reg_pmlp_module_get(pmlp_pl, i) != module) {
615 		if (mlxsw_reg_pmlp_slot_index_get(pmlp_pl, i) != slot_index) {
621 		    mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, i) !=
622 		    mlxsw_reg_pmlp_rx_lane_get(pmlp_pl, i)) {
627 		if (mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, i) != i + first_lane) {
638 	port_mapping->lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
646 	char pmlp_pl[MLXSW_REG_PMLP_LEN];
649 	mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
650 	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
654 					       pmlp_pl, port_mapping);
661 	char pmlp_pl[MLXSW_REG_PMLP_LEN];
667 	mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
668 	mlxsw_reg_pmlp_width_set(pmlp_pl, port_mapping->width);
670 		mlxsw_reg_pmlp_slot_index_set(pmlp_pl, i,
672 		mlxsw_reg_pmlp_module_set(pmlp_pl, i, port_mapping->module);
673 		mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, port_mapping->lane + i); /* Rx & Tx */
676 	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
690 	char pmlp_pl[MLXSW_REG_PMLP_LEN];
692 	mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
693 	mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
694 	mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
1993 	char pmlp_pl[MLXSW_REG_PMLP_LEN];
2016 		local_port = mlxsw_reg_pmlp_local_port_get(event->pmlp_pl);
2018 						      event->pmlp_pl, &port_mapping);
2044 				    char *pmlp_pl, void *priv)
2051 	local_port = mlxsw_reg_pmlp_local_port_get(pmlp_pl);
2059 	memcpy(event->pmlp_pl, pmlp_pl, sizeof(event->pmlp_pl));